mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
12600e48ca
Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
275 lines
5.9 KiB
Plaintext
275 lines
5.9 KiB
Plaintext
/*
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* MPC8313E RDB Device Tree Source
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*
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* Copyright 2005, 2006, 2007 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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/ {
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model = "MPC8313ERDB";
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compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB";
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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ethernet0 = &enet0;
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ethernet1 = &enet1;
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serial0 = &serial0;
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serial1 = &serial1;
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pci0 = &pci0;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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PowerPC,8313@0 {
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device_type = "cpu";
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reg = <0>;
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d-cache-line-size = <20>; // 32 bytes
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i-cache-line-size = <20>; // 32 bytes
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d-cache-size = <4000>; // L1, 16K
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i-cache-size = <4000>; // L1, 16K
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timebase-frequency = <0>; // from bootloader
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bus-frequency = <0>; // from bootloader
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clock-frequency = <0>; // from bootloader
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};
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};
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memory {
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device_type = "memory";
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reg = <00000000 08000000>; // 128MB at 0
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};
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localbus@e0005000 {
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#address-cells = <2>;
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#size-cells = <1>;
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compatible = "fsl,mpc8313-elbc", "fsl,elbc", "simple-bus";
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reg = <e0005000 1000>;
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interrupts = <d#77 8>;
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interrupt-parent = <&ipic>;
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// CS0 and CS1 are swapped when
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// booting from nand, but the
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// addresses are the same.
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ranges = <0 0 fe000000 00800000
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1 0 e2800000 00008000
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2 0 f0000000 00020000
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3 0 fa000000 00008000>;
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flash@0,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash";
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reg = <0 0 800000>;
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bank-width = <2>;
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device-width = <1>;
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};
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nand@1,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,mpc8313-fcm-nand",
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"fsl,elbc-fcm-nand";
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reg = <1 0 2000>;
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u-boot@0 {
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reg = <0 100000>;
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read-only;
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};
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kernel@100000 {
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reg = <100000 300000>;
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};
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fs@400000 {
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reg = <400000 1c00000>;
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};
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};
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};
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soc8313@e0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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compatible = "simple-bus";
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ranges = <0 e0000000 00100000>;
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reg = <e0000000 00000200>;
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bus-frequency = <0>;
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wdt@200 {
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device_type = "watchdog";
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compatible = "mpc83xx_wdt";
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reg = <200 100>;
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};
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i2c@3000 {
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#address-cells = <1>;
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#size-cells = <0>;
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cell-index = <0>;
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compatible = "fsl-i2c";
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reg = <3000 100>;
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interrupts = <e 8>;
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interrupt-parent = < &ipic >;
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dfsrr;
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};
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i2c@3100 {
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#address-cells = <1>;
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#size-cells = <0>;
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cell-index = <1>;
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compatible = "fsl-i2c";
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reg = <3100 100>;
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interrupts = <f 8>;
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interrupt-parent = < &ipic >;
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dfsrr;
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};
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spi@7000 {
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device_type = "spi";
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compatible = "fsl_spi";
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reg = <7000 1000>;
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interrupts = <10 8>;
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interrupt-parent = < &ipic >;
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mode = "cpu";
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};
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/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
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usb@23000 {
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compatible = "fsl-usb2-dr";
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reg = <23000 1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = < &ipic >;
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interrupts = <26 8>;
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phy_type = "utmi_wide";
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};
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mdio@24520 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,gianfar-mdio";
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reg = <24520 20>;
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phy1: ethernet-phy@1 {
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interrupt-parent = < &ipic >;
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interrupts = <13 8>;
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reg = <1>;
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device_type = "ethernet-phy";
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};
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phy4: ethernet-phy@4 {
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interrupt-parent = < &ipic >;
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interrupts = <14 8>;
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reg = <4>;
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device_type = "ethernet-phy";
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};
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};
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enet0: ethernet@24000 {
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cell-index = <0>;
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device_type = "network";
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model = "eTSEC";
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compatible = "gianfar";
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reg = <24000 1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <25 8 24 8 23 8>;
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interrupt-parent = < &ipic >;
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phy-handle = < &phy1 >;
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};
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enet1: ethernet@25000 {
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cell-index = <1>;
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device_type = "network";
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model = "eTSEC";
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compatible = "gianfar";
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reg = <25000 1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <22 8 21 8 20 8>;
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interrupt-parent = < &ipic >;
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phy-handle = < &phy4 >;
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};
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serial0: serial@4500 {
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cell-index = <0>;
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device_type = "serial";
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compatible = "ns16550";
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reg = <4500 100>;
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clock-frequency = <0>;
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interrupts = <9 8>;
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interrupt-parent = < &ipic >;
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};
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serial1: serial@4600 {
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cell-index = <1>;
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device_type = "serial";
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compatible = "ns16550";
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reg = <4600 100>;
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clock-frequency = <0>;
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interrupts = <a 8>;
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interrupt-parent = < &ipic >;
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};
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crypto@30000 {
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device_type = "crypto";
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model = "SEC2";
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compatible = "talitos";
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reg = <30000 7000>;
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interrupts = <b 8>;
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interrupt-parent = < &ipic >;
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/* Rev. 2.2 */
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num-channels = <1>;
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channel-fifo-len = <18>;
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exec-units-mask = <0000004c>;
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descriptor-types-mask = <0122003f>;
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};
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/* IPIC
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* interrupts cell = <intr #, sense>
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* sense values match linux IORESOURCE_IRQ_* defines:
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* sense == 8: Level, low assertion
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* sense == 2: Edge, high-to-low change
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*/
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ipic: pic@700 {
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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reg = <700 100>;
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device_type = "ipic";
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};
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};
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pci0: pci@e0008500 {
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cell-index = <1>;
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interrupt-map-mask = <f800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x0E -mini PCI */
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7000 0 0 1 &ipic 12 8
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7000 0 0 2 &ipic 12 8
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7000 0 0 3 &ipic 12 8
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7000 0 0 4 &ipic 12 8
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/* IDSEL 0x0F - PCI slot */
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7800 0 0 1 &ipic 11 8
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7800 0 0 2 &ipic 12 8
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7800 0 0 3 &ipic 11 8
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7800 0 0 4 &ipic 12 8>;
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interrupt-parent = < &ipic >;
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interrupts = <42 8>;
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bus-range = <0 0>;
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ranges = <02000000 0 90000000 90000000 0 10000000
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42000000 0 80000000 80000000 0 10000000
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01000000 0 00000000 e2000000 0 00100000>;
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clock-frequency = <3f940aa>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <e0008500 100>;
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compatible = "fsl,mpc8349-pci";
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device_type = "pci";
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};
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};
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