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To take advantage of the hardware pipeline implementation of AES-NI instructions. CTR mode cryption is implemented in ASM to schedule multiple AES-NI instructions one after another. This way, some latency of AES-NI instruction can be eliminated. Performance testing based on dm-crypt should 50% reduction of ecryption/decryption time. Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> |
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.. | ||
aes_glue.c | ||
aes-i586-asm_32.S | ||
aes-x86_64-asm_64.S | ||
aesni-intel_asm.S | ||
aesni-intel_glue.c | ||
crc32c-intel.c | ||
fpu.c | ||
ghash-clmulni-intel_asm.S | ||
ghash-clmulni-intel_glue.c | ||
Makefile | ||
salsa20_glue.c | ||
salsa20-i586-asm_32.S | ||
salsa20-x86_64-asm_64.S | ||
twofish_glue.c | ||
twofish-i586-asm_32.S | ||
twofish-x86_64-asm_64.S |