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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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The change of the access rights for an address range in the kernel address space is currently done with a loop of IPTE + a store of the modified PTE. Between the IPTE and the store the PTE will be invalid, this intermediate state can cause problems with concurrent accesses. Consider a change of a kernel area from read-write to read-only, a concurrent reader of that area should be fine but with the invalid PTE it might get an unexpected exception. Remove the IPTEs for each PTE and do a global flush after all PTEs have been modified. Reviewed-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
169 lines
3.3 KiB
C
169 lines
3.3 KiB
C
/*
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* Copyright IBM Corp. 2011
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* Author(s): Jan Glauber <jang@linux.vnet.ibm.com>
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*/
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#include <linux/hugetlb.h>
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#include <linux/module.h>
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#include <linux/mm.h>
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#include <asm/cacheflush.h>
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#include <asm/facility.h>
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#include <asm/pgtable.h>
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#include <asm/page.h>
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#if PAGE_DEFAULT_KEY
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static inline unsigned long sske_frame(unsigned long addr, unsigned char skey)
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{
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asm volatile(".insn rrf,0xb22b0000,%[skey],%[addr],9,0"
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: [addr] "+a" (addr) : [skey] "d" (skey));
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return addr;
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}
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void __storage_key_init_range(unsigned long start, unsigned long end)
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{
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unsigned long boundary, size;
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while (start < end) {
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if (MACHINE_HAS_EDAT1) {
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/* set storage keys for a 1MB frame */
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size = 1UL << 20;
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boundary = (start + size) & ~(size - 1);
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if (boundary <= end) {
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do {
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start = sske_frame(start, PAGE_DEFAULT_KEY);
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} while (start < boundary);
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continue;
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}
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}
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page_set_storage_key(start, PAGE_DEFAULT_KEY, 0);
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start += PAGE_SIZE;
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}
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}
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#endif
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static pte_t *walk_page_table(unsigned long addr)
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{
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pgd_t *pgdp;
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pud_t *pudp;
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pmd_t *pmdp;
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pte_t *ptep;
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pgdp = pgd_offset_k(addr);
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if (pgd_none(*pgdp))
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return NULL;
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pudp = pud_offset(pgdp, addr);
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if (pud_none(*pudp) || pud_large(*pudp))
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return NULL;
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pmdp = pmd_offset(pudp, addr);
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if (pmd_none(*pmdp) || pmd_large(*pmdp))
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return NULL;
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ptep = pte_offset_kernel(pmdp, addr);
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if (pte_none(*ptep))
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return NULL;
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return ptep;
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}
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static void change_page_attr(unsigned long addr, int numpages,
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pte_t (*set) (pte_t))
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{
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pte_t *ptep;
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int i;
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for (i = 0; i < numpages; i++) {
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ptep = walk_page_table(addr);
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if (WARN_ON_ONCE(!ptep))
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break;
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*ptep = set(*ptep);
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addr += PAGE_SIZE;
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}
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__tlb_flush_kernel();
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}
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int set_memory_ro(unsigned long addr, int numpages)
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{
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change_page_attr(addr, numpages, pte_wrprotect);
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return 0;
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}
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int set_memory_rw(unsigned long addr, int numpages)
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{
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change_page_attr(addr, numpages, pte_mkwrite);
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return 0;
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}
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/* not possible */
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int set_memory_nx(unsigned long addr, int numpages)
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{
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return 0;
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}
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int set_memory_x(unsigned long addr, int numpages)
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{
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return 0;
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}
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#ifdef CONFIG_DEBUG_PAGEALLOC
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static void ipte_range(pte_t *pte, unsigned long address, int nr)
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{
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int i;
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if (test_facility(13)) {
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__ptep_ipte_range(address, nr - 1, pte);
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return;
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}
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for (i = 0; i < nr; i++) {
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__ptep_ipte(address, pte);
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address += PAGE_SIZE;
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pte++;
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}
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}
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void __kernel_map_pages(struct page *page, int numpages, int enable)
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{
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unsigned long address;
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int nr, i, j;
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pgd_t *pgd;
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pud_t *pud;
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pmd_t *pmd;
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pte_t *pte;
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for (i = 0; i < numpages;) {
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address = page_to_phys(page + i);
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pgd = pgd_offset_k(address);
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pud = pud_offset(pgd, address);
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pmd = pmd_offset(pud, address);
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pte = pte_offset_kernel(pmd, address);
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nr = (unsigned long)pte >> ilog2(sizeof(long));
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nr = PTRS_PER_PTE - (nr & (PTRS_PER_PTE - 1));
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nr = min(numpages - i, nr);
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if (enable) {
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for (j = 0; j < nr; j++) {
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pte_val(*pte) = __pa(address);
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address += PAGE_SIZE;
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pte++;
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}
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} else {
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ipte_range(pte, address, nr);
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}
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i += nr;
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}
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}
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#ifdef CONFIG_HIBERNATION
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bool kernel_page_present(struct page *page)
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{
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unsigned long addr;
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int cc;
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addr = page_to_phys(page);
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asm volatile(
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" lra %1,0(%1)\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (cc), "+a" (addr) : : "cc");
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return cc == 0;
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}
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#endif /* CONFIG_HIBERNATION */
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#endif /* CONFIG_DEBUG_PAGEALLOC */
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