Shashank Sharma 11b8e4f58e drm/i915/bxt: Program Tx Rx and Dphy clocks ... BXT DSI clocks are different than previous platforms. So adding a new function to program following clocks and dividers: 1. Program variable divider to generate input to Tx clock divider (Output value must be < 39.5Mhz) 2. Select divide by 2 option to get < 20Mhz for Tx clock 3. Program 8by3 divider to generate Rx clock v2: Fixed Jani's review comments. Adjusted the Macro definition as per convention. Simplified the logic for bit definitions for MIPI PORT A and PORT C in same registers. v3: Refactored the macros for TX, RX Escape and DPHY clocks as per Jani's suggestion. v4: Addressed Jani's review comments. Signed-off-by: Shashank Sharma <shashank.sharma@intel.com> Signed-off-by: Uma Shankar <uma.shankar@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>		2015-10-02 14:44:41 +02:00
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drm	drm/i915/bxt: Program Tx Rx and Dphy clocks	2015-10-02 14:44:41 +02:00
host1x	gpu: host1x: mipi: Power down regulators when unused	2015-08-13 13:47:21 +02:00
ipu-v3	gpu/drm: Kill off set_irq_flags usage	2015-09-16 16:53:38 +02:00
vga	vga_switcheroo: Set active attribute to false for audio clients	2015-09-24 20:14:25 +02:00
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