Fuyun Liang 11af96a47b net: hns3: add int_gl_idx setup for TX and RX queues ... If the int_gl_idx does not be set, the default interrupt coalesce index is 0. The TX queues and the RX queues will both use the GL0 as the interrupt coalesce GL switch. But it should be GL1 for TX queues and GL0 for RX queues. This patch adds the int_gl_idx setup for TX queues and RX queues. Fixes: 76ad4f0ee7 ("net: hns3: Add support of HNS3 Ethernet Driver for hip08 SoC") Signed-off-by: Fuyun Liang <liangfuyun1@huawei.com> Signed-off-by: Peng Li <lipeng321@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>		2018-01-12 10:12:33 -05:00
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hclge_cmd.c	net: hns3: Refactor the initialization of command queue	2017-11-02 21:28:35 +09:00
hclge_cmd.h	net: hns3: fix for setting MTU	2018-01-08 14:06:19 -05:00
hclge_dcb.c	net: hns3: Add mqprio hardware offload support in hns3 driver	2017-10-19 12:45:45 +01:00
hclge_dcb.h	net: hns3: Add hclge_dcb module for the support of DCB feature	2017-09-28 10:35:12 -07:00
hclge_main.c	net: hns3: add int_gl_idx setup for TX and RX queues	2018-01-12 10:12:33 -05:00
hclge_main.h	net: hns3: Add more packet size statisctics	2018-01-08 14:06:19 -05:00
hclge_mbx.c	net: hns3: Change PF to add ring-vect binding & resetQ to mailbox	2017-12-15 10:55:35 -05:00
hclge_mdio.c	net: hns3: add Asym Pause support to phy default features	2017-12-27 10:42:03 -05:00
hclge_mdio.h	net: hns3: Add MDIO support to HNS3 Ethernet driver for hip08 SoC	2017-08-03 15:08:17 -07:00
hclge_tm.c	net: hns3: fix for not setting pause parameters	2018-01-08 14:06:19 -05:00
hclge_tm.h	net: hns3: fix for not setting pause parameters	2018-01-08 14:06:19 -05:00
Makefile	net: hns3: Add mailbox support to PF driver	2017-12-15 10:55:35 -05:00