mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 02:20:52 +07:00
94cb669ceb
Routing device accesses to the host memory requires the usage of a base offset, which is canceled by the iATU just before leaving the device. The value of the base offset might be distinctive between different ASIC types. The manipulation of the addresses is currently used throughout the driver code, and one should be aware to it whenever providing a host memory address to the device. This patch removes this manipulation from the driver common code, and moves it to the ASIC specific functions that are responsible for host memory allocation/mapping. Signed-off-by: Tomer Tayar <ttayar@habana.ai> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
323 lines
7.5 KiB
C
323 lines
7.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2016-2019 HabanaLabs, Ltd.
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* All Rights Reserved.
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*/
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#include "habanalabs.h"
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#include <linux/firmware.h>
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#include <linux/genalloc.h>
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#include <linux/io-64-nonatomic-lo-hi.h>
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/**
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* hl_fw_push_fw_to_device() - Push FW code to device.
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* @hdev: pointer to hl_device structure.
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*
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* Copy fw code from firmware file to device memory.
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*
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* Return: 0 on success, non-zero for failure.
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*/
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int hl_fw_push_fw_to_device(struct hl_device *hdev, const char *fw_name,
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void __iomem *dst)
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{
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const struct firmware *fw;
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const u64 *fw_data;
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size_t fw_size, i;
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int rc;
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rc = request_firmware(&fw, fw_name, hdev->dev);
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if (rc) {
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dev_err(hdev->dev, "Failed to request %s\n", fw_name);
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goto out;
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}
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fw_size = fw->size;
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if ((fw_size % 4) != 0) {
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dev_err(hdev->dev, "illegal %s firmware size %zu\n",
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fw_name, fw_size);
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rc = -EINVAL;
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goto out;
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}
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dev_dbg(hdev->dev, "%s firmware size == %zu\n", fw_name, fw_size);
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fw_data = (const u64 *) fw->data;
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if ((fw->size % 8) != 0)
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fw_size -= 8;
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for (i = 0 ; i < fw_size ; i += 8, fw_data++, dst += 8) {
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if (!(i & (0x80000 - 1))) {
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dev_dbg(hdev->dev,
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"copied so far %zu out of %zu for %s firmware",
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i, fw_size, fw_name);
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usleep_range(20, 100);
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}
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writeq(*fw_data, dst);
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}
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if ((fw->size % 8) != 0)
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writel(*(const u32 *) fw_data, dst);
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out:
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release_firmware(fw);
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return rc;
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}
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int hl_fw_send_pci_access_msg(struct hl_device *hdev, u32 opcode)
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{
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struct armcp_packet pkt = {};
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pkt.ctl = cpu_to_le32(opcode << ARMCP_PKT_CTL_OPCODE_SHIFT);
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return hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt,
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sizeof(pkt), HL_DEVICE_TIMEOUT_USEC, NULL);
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}
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int hl_fw_send_cpu_message(struct hl_device *hdev, u32 hw_queue_id, u32 *msg,
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u16 len, u32 timeout, long *result)
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{
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struct armcp_packet *pkt;
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dma_addr_t pkt_dma_addr;
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u32 tmp;
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int rc = 0;
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if (len > HL_CPU_CB_SIZE) {
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dev_err(hdev->dev, "Invalid CPU message size of %d bytes\n",
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len);
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return -ENOMEM;
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}
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pkt = hdev->asic_funcs->cpu_accessible_dma_pool_alloc(hdev, len,
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&pkt_dma_addr);
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if (!pkt) {
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dev_err(hdev->dev,
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"Failed to allocate DMA memory for packet to CPU\n");
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return -ENOMEM;
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}
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memcpy(pkt, msg, len);
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mutex_lock(&hdev->send_cpu_message_lock);
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if (hdev->disabled)
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goto out;
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if (hdev->device_cpu_disabled) {
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rc = -EIO;
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goto out;
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}
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rc = hl_hw_queue_send_cb_no_cmpl(hdev, hw_queue_id, len, pkt_dma_addr);
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if (rc) {
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dev_err(hdev->dev, "Failed to send CB on CPU PQ (%d)\n", rc);
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goto out;
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}
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rc = hl_poll_timeout_memory(hdev, (u64) (uintptr_t) &pkt->fence,
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timeout, &tmp);
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hl_hw_queue_inc_ci_kernel(hdev, hw_queue_id);
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if (rc == -ETIMEDOUT) {
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dev_err(hdev->dev, "Timeout while waiting for device CPU\n");
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hdev->device_cpu_disabled = true;
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goto out;
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}
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if (tmp == ARMCP_PACKET_FENCE_VAL) {
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u32 ctl = le32_to_cpu(pkt->ctl);
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rc = (ctl & ARMCP_PKT_CTL_RC_MASK) >> ARMCP_PKT_CTL_RC_SHIFT;
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if (rc) {
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dev_err(hdev->dev,
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"F/W ERROR %d for CPU packet %d\n",
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rc, (ctl & ARMCP_PKT_CTL_OPCODE_MASK)
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>> ARMCP_PKT_CTL_OPCODE_SHIFT);
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rc = -EINVAL;
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} else if (result) {
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*result = (long) le64_to_cpu(pkt->result);
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}
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} else {
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dev_err(hdev->dev, "CPU packet wrong fence value\n");
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rc = -EINVAL;
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}
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out:
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mutex_unlock(&hdev->send_cpu_message_lock);
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hdev->asic_funcs->cpu_accessible_dma_pool_free(hdev, len, pkt);
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return rc;
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}
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int hl_fw_test_cpu_queue(struct hl_device *hdev)
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{
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struct armcp_packet test_pkt = {};
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long result;
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int rc;
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test_pkt.ctl = cpu_to_le32(ARMCP_PACKET_TEST <<
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ARMCP_PKT_CTL_OPCODE_SHIFT);
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test_pkt.value = cpu_to_le64(ARMCP_PACKET_FENCE_VAL);
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rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &test_pkt,
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sizeof(test_pkt), HL_DEVICE_TIMEOUT_USEC, &result);
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if (!rc) {
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if (result == ARMCP_PACKET_FENCE_VAL)
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dev_info(hdev->dev,
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"queue test on CPU queue succeeded\n");
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else
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dev_err(hdev->dev,
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"CPU queue test failed (0x%08lX)\n", result);
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} else {
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dev_err(hdev->dev, "CPU queue test failed, error %d\n", rc);
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}
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return rc;
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}
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void *hl_fw_cpu_accessible_dma_pool_alloc(struct hl_device *hdev, size_t size,
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dma_addr_t *dma_handle)
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{
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u64 kernel_addr;
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/* roundup to HL_CPU_PKT_SIZE */
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size = (size + (HL_CPU_PKT_SIZE - 1)) & HL_CPU_PKT_MASK;
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kernel_addr = gen_pool_alloc(hdev->cpu_accessible_dma_pool, size);
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*dma_handle = hdev->cpu_accessible_dma_address +
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(kernel_addr - (u64) (uintptr_t) hdev->cpu_accessible_dma_mem);
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return (void *) (uintptr_t) kernel_addr;
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}
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void hl_fw_cpu_accessible_dma_pool_free(struct hl_device *hdev, size_t size,
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void *vaddr)
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{
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/* roundup to HL_CPU_PKT_SIZE */
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size = (size + (HL_CPU_PKT_SIZE - 1)) & HL_CPU_PKT_MASK;
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gen_pool_free(hdev->cpu_accessible_dma_pool, (u64) (uintptr_t) vaddr,
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size);
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}
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int hl_fw_send_heartbeat(struct hl_device *hdev)
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{
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struct armcp_packet hb_pkt = {};
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long result;
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int rc;
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hb_pkt.ctl = cpu_to_le32(ARMCP_PACKET_TEST <<
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ARMCP_PKT_CTL_OPCODE_SHIFT);
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hb_pkt.value = cpu_to_le64(ARMCP_PACKET_FENCE_VAL);
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rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &hb_pkt,
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sizeof(hb_pkt), HL_DEVICE_TIMEOUT_USEC, &result);
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if ((rc) || (result != ARMCP_PACKET_FENCE_VAL))
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rc = -EIO;
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return rc;
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}
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int hl_fw_armcp_info_get(struct hl_device *hdev)
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{
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struct asic_fixed_properties *prop = &hdev->asic_prop;
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struct armcp_packet pkt = {};
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void *armcp_info_cpu_addr;
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dma_addr_t armcp_info_dma_addr;
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long result;
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int rc;
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armcp_info_cpu_addr =
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hdev->asic_funcs->cpu_accessible_dma_pool_alloc(hdev,
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sizeof(struct armcp_info),
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&armcp_info_dma_addr);
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if (!armcp_info_cpu_addr) {
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dev_err(hdev->dev,
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"Failed to allocate DMA memory for ArmCP info packet\n");
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return -ENOMEM;
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}
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memset(armcp_info_cpu_addr, 0, sizeof(struct armcp_info));
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pkt.ctl = cpu_to_le32(ARMCP_PACKET_INFO_GET <<
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ARMCP_PKT_CTL_OPCODE_SHIFT);
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pkt.addr = cpu_to_le64(armcp_info_dma_addr);
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pkt.data_max_size = cpu_to_le32(sizeof(struct armcp_info));
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rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
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HL_ARMCP_INFO_TIMEOUT_USEC, &result);
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if (rc) {
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dev_err(hdev->dev,
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"Failed to send armcp info pkt, error %d\n", rc);
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goto out;
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}
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memcpy(&prop->armcp_info, armcp_info_cpu_addr,
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sizeof(prop->armcp_info));
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rc = hl_build_hwmon_channel_info(hdev, prop->armcp_info.sensors);
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if (rc) {
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dev_err(hdev->dev,
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"Failed to build hwmon channel info, error %d\n", rc);
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rc = -EFAULT;
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goto out;
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}
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out:
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hdev->asic_funcs->cpu_accessible_dma_pool_free(hdev,
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sizeof(struct armcp_info), armcp_info_cpu_addr);
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return rc;
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}
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int hl_fw_get_eeprom_data(struct hl_device *hdev, void *data, size_t max_size)
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{
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struct armcp_packet pkt = {};
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void *eeprom_info_cpu_addr;
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dma_addr_t eeprom_info_dma_addr;
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long result;
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int rc;
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eeprom_info_cpu_addr =
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hdev->asic_funcs->cpu_accessible_dma_pool_alloc(hdev,
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max_size, &eeprom_info_dma_addr);
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if (!eeprom_info_cpu_addr) {
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dev_err(hdev->dev,
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"Failed to allocate DMA memory for EEPROM info packet\n");
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return -ENOMEM;
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}
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memset(eeprom_info_cpu_addr, 0, max_size);
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pkt.ctl = cpu_to_le32(ARMCP_PACKET_EEPROM_DATA_GET <<
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ARMCP_PKT_CTL_OPCODE_SHIFT);
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pkt.addr = cpu_to_le64(eeprom_info_dma_addr);
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pkt.data_max_size = cpu_to_le32(max_size);
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rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
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HL_ARMCP_EEPROM_TIMEOUT_USEC, &result);
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if (rc) {
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dev_err(hdev->dev,
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"Failed to send armcp EEPROM pkt, error %d\n", rc);
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goto out;
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}
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/* result contains the actual size */
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memcpy(data, eeprom_info_cpu_addr, min((size_t)result, max_size));
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out:
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hdev->asic_funcs->cpu_accessible_dma_pool_free(hdev, max_size,
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eeprom_info_cpu_addr);
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return rc;
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}
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