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c790c3d2b0
This test uses the PMU to count branch prediction hits/misses for a known loop, and compare the result to the reported spectre v2 mitigation. This gives us a way of sanity checking that the reported mitigation is actually in effect. Sample output for some cases, eg: Power9: sysfs reports: 'Vulnerable' PM_BR_PRED_CCACHE: result 368 running/enabled 5792777124 PM_BR_MPRED_CCACHE: result 319 running/enabled 5792775546 PM_BR_PRED_PCACHE: result 2147483281 running/enabled 5792773128 PM_BR_MPRED_PCACHE: result 213604201 running/enabled 5792771640 Miss percent 9 % OK - Measured branch prediction rates match reported spectre v2 mitigation. sysfs reports: 'Mitigation: Indirect branch serialisation (kernel only)' PM_BR_PRED_CCACHE: result 895 running/enabled 5780320920 PM_BR_MPRED_CCACHE: result 822 running/enabled 5780312414 PM_BR_PRED_PCACHE: result 2147482754 running/enabled 5780308836 PM_BR_MPRED_PCACHE: result 213639731 running/enabled 5780307912 Miss percent 9 % OK - Measured branch prediction rates match reported spectre v2 mitigation. sysfs reports: 'Mitigation: Indirect branch cache disabled' PM_BR_PRED_CCACHE: result 2147483649 running/enabled 20540186160 PM_BR_MPRED_CCACHE: result 2147483649 running/enabled 20540180056 PM_BR_PRED_PCACHE: result 0 running/enabled 20540176090 PM_BR_MPRED_PCACHE: result 0 running/enabled 20540174182 Miss percent 100 % OK - Measured branch prediction rates match reported spectre v2 mitigation. Power8: sysfs reports: 'Vulnerable' PM_BR_PRED_CCACHE: result 2147483649 running/enabled 3505888142 PM_BR_MPRED_CCACHE: result 9 running/enabled 3505882788 Miss percent 0 % OK - Measured branch prediction rates match reported spectre v2 mitigation. sysfs reports: 'Mitigation: Indirect branch cache disabled' PM_BR_PRED_CCACHE: result 2147483649 running/enabled 16931421988 PM_BR_MPRED_CCACHE: result 2147483649 running/enabled 16931416478 Miss percent 100 % OK - Measured branch prediction rates match reported spectre v2 mitigation. success: spectre_v2 Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20190520105520.22274-1-mpe@ellerman.id.au
296 lines
5.3 KiB
C
296 lines
5.3 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright 2013-2015, Michael Ellerman, IBM Corp.
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*/
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#define _GNU_SOURCE /* For CPU_ZERO etc. */
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#include <elf.h>
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#include <errno.h>
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#include <fcntl.h>
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#include <link.h>
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#include <sched.h>
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#include <signal.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <sys/ioctl.h>
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#include <sys/stat.h>
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#include <sys/types.h>
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#include <sys/utsname.h>
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#include <unistd.h>
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#include <asm/unistd.h>
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#include <linux/limits.h>
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#include "utils.h"
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static char auxv[4096];
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int read_auxv(char *buf, ssize_t buf_size)
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{
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ssize_t num;
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int rc, fd;
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fd = open("/proc/self/auxv", O_RDONLY);
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if (fd == -1) {
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perror("open");
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return -errno;
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}
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num = read(fd, buf, buf_size);
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if (num < 0) {
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perror("read");
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rc = -EIO;
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goto out;
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}
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if (num > buf_size) {
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printf("overflowed auxv buffer\n");
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rc = -EOVERFLOW;
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goto out;
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}
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rc = 0;
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out:
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close(fd);
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return rc;
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}
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void *find_auxv_entry(int type, char *auxv)
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{
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ElfW(auxv_t) *p;
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p = (ElfW(auxv_t) *)auxv;
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while (p->a_type != AT_NULL) {
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if (p->a_type == type)
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return p;
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p++;
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}
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return NULL;
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}
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void *get_auxv_entry(int type)
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{
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ElfW(auxv_t) *p;
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if (read_auxv(auxv, sizeof(auxv)))
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return NULL;
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p = find_auxv_entry(type, auxv);
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if (p)
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return (void *)p->a_un.a_val;
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return NULL;
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}
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int pick_online_cpu(void)
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{
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cpu_set_t mask;
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int cpu;
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CPU_ZERO(&mask);
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if (sched_getaffinity(0, sizeof(mask), &mask)) {
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perror("sched_getaffinity");
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return -1;
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}
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/* We prefer a primary thread, but skip 0 */
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for (cpu = 8; cpu < CPU_SETSIZE; cpu += 8)
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if (CPU_ISSET(cpu, &mask))
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return cpu;
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/* Search for anything, but in reverse */
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for (cpu = CPU_SETSIZE - 1; cpu >= 0; cpu--)
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if (CPU_ISSET(cpu, &mask))
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return cpu;
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printf("No cpus in affinity mask?!\n");
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return -1;
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}
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bool is_ppc64le(void)
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{
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struct utsname uts;
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int rc;
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errno = 0;
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rc = uname(&uts);
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if (rc) {
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perror("uname");
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return false;
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}
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return strcmp(uts.machine, "ppc64le") == 0;
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}
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int read_sysfs_file(char *fpath, char *result, size_t result_size)
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{
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char path[PATH_MAX] = "/sys/";
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int rc = -1, fd;
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strncat(path, fpath, PATH_MAX - strlen(path) - 1);
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if ((fd = open(path, O_RDONLY)) < 0)
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return rc;
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rc = read(fd, result, result_size);
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close(fd);
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if (rc < 0)
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return rc;
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return 0;
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}
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int read_debugfs_file(char *debugfs_file, int *result)
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{
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int rc = -1, fd;
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char path[PATH_MAX];
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char value[16];
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strcpy(path, "/sys/kernel/debug/");
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strncat(path, debugfs_file, PATH_MAX - strlen(path) - 1);
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if ((fd = open(path, O_RDONLY)) < 0)
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return rc;
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if ((rc = read(fd, value, sizeof(value))) < 0)
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return rc;
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value[15] = 0;
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*result = atoi(value);
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close(fd);
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return 0;
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}
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int write_debugfs_file(char *debugfs_file, int result)
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{
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int rc = -1, fd;
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char path[PATH_MAX];
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char value[16];
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strcpy(path, "/sys/kernel/debug/");
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strncat(path, debugfs_file, PATH_MAX - strlen(path) - 1);
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if ((fd = open(path, O_WRONLY)) < 0)
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return rc;
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snprintf(value, 16, "%d", result);
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if ((rc = write(fd, value, strlen(value))) < 0)
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return rc;
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close(fd);
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return 0;
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}
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static long perf_event_open(struct perf_event_attr *hw_event, pid_t pid,
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int cpu, int group_fd, unsigned long flags)
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{
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return syscall(__NR_perf_event_open, hw_event, pid, cpu,
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group_fd, flags);
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}
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static void perf_event_attr_init(struct perf_event_attr *event_attr,
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unsigned int type,
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unsigned long config)
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{
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memset(event_attr, 0, sizeof(*event_attr));
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event_attr->type = type;
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event_attr->size = sizeof(struct perf_event_attr);
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event_attr->config = config;
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event_attr->read_format = PERF_FORMAT_GROUP;
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event_attr->disabled = 1;
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event_attr->exclude_kernel = 1;
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event_attr->exclude_hv = 1;
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event_attr->exclude_guest = 1;
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}
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int perf_event_open_counter(unsigned int type,
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unsigned long config, int group_fd)
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{
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int fd;
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struct perf_event_attr event_attr;
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perf_event_attr_init(&event_attr, type, config);
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fd = perf_event_open(&event_attr, 0, -1, group_fd, 0);
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if (fd < 0)
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perror("perf_event_open() failed");
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return fd;
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}
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int perf_event_enable(int fd)
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{
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if (ioctl(fd, PERF_EVENT_IOC_ENABLE, PERF_IOC_FLAG_GROUP) == -1) {
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perror("error while enabling perf events");
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return -1;
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}
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return 0;
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}
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int perf_event_disable(int fd)
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{
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if (ioctl(fd, PERF_EVENT_IOC_DISABLE, PERF_IOC_FLAG_GROUP) == -1) {
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perror("error disabling perf events");
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return -1;
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}
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return 0;
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}
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int perf_event_reset(int fd)
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{
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if (ioctl(fd, PERF_EVENT_IOC_RESET, PERF_IOC_FLAG_GROUP) == -1) {
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perror("error resetting perf events");
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return -1;
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}
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return 0;
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}
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static void sigill_handler(int signr, siginfo_t *info, void *unused)
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{
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static int warned = 0;
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ucontext_t *ctx = (ucontext_t *)unused;
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unsigned long *pc = &UCONTEXT_NIA(ctx);
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/* mtspr 3,RS to check for move to DSCR below */
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if ((*((unsigned int *)*pc) & 0xfc1fffff) == 0x7c0303a6) {
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if (!warned++)
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printf("WARNING: Skipping over dscr setup. Consider running 'ppc64_cpu --dscr=1' manually.\n");
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*pc += 4;
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} else {
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printf("SIGILL at %p\n", pc);
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abort();
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}
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}
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void set_dscr(unsigned long val)
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{
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static int init = 0;
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struct sigaction sa;
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if (!init) {
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memset(&sa, 0, sizeof(sa));
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sa.sa_sigaction = sigill_handler;
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sa.sa_flags = SA_SIGINFO;
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if (sigaction(SIGILL, &sa, NULL))
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perror("sigill_handler");
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init = 1;
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}
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asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
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}
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