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Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
102 lines
2.6 KiB
C
102 lines
2.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* 10G controller driver for Samsung SoCs
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*
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* Copyright (C) 2013 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Author: Siva Reddy Kallam <siva.kallam@samsung.com>
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*/
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#ifndef __SXGBE_MTL_H__
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#define __SXGBE_MTL_H__
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#define SXGBE_MTL_OPMODE_ESTMASK 0x3
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#define SXGBE_MTL_OPMODE_RAAMASK 0x1
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#define SXGBE_MTL_FCMASK 0x7
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#define SXGBE_MTL_TX_FIFO_DIV 256
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#define SXGBE_MTL_RX_FIFO_DIV 256
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#define SXGBE_MTL_RXQ_OP_FEP BIT(4)
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#define SXGBE_MTL_RXQ_OP_FUP BIT(3)
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#define SXGBE_MTL_ENABLE_FC 0x80
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#define ETS_WRR 0xFFFFFF9F
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#define ETS_RST 0xFFFFFF9F
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#define ETS_WFQ 0x00000020
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#define ETS_DWRR 0x00000040
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#define RAA_SP 0xFFFFFFFB
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#define RAA_WSP 0x00000004
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#define RX_QUEUE_DYNAMIC 0x80808080
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#define RX_FC_ACTIVE 8
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#define RX_FC_DEACTIVE 13
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enum ttc_control {
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MTL_CONTROL_TTC_64 = 0x00000000,
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MTL_CONTROL_TTC_96 = 0x00000020,
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MTL_CONTROL_TTC_128 = 0x00000030,
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MTL_CONTROL_TTC_192 = 0x00000040,
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MTL_CONTROL_TTC_256 = 0x00000050,
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MTL_CONTROL_TTC_384 = 0x00000060,
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MTL_CONTROL_TTC_512 = 0x00000070,
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};
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enum rtc_control {
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MTL_CONTROL_RTC_64 = 0x00000000,
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MTL_CONTROL_RTC_96 = 0x00000002,
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MTL_CONTROL_RTC_128 = 0x00000003,
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};
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enum flow_control_th {
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MTL_FC_FULL_1K = 0x00000000,
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MTL_FC_FULL_2K = 0x00000001,
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MTL_FC_FULL_4K = 0x00000002,
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MTL_FC_FULL_5K = 0x00000003,
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MTL_FC_FULL_6K = 0x00000004,
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MTL_FC_FULL_8K = 0x00000005,
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MTL_FC_FULL_16K = 0x00000006,
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MTL_FC_FULL_24K = 0x00000007,
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};
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struct sxgbe_mtl_ops {
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void (*mtl_init)(void __iomem *ioaddr, unsigned int etsalg,
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unsigned int raa);
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void (*mtl_set_txfifosize)(void __iomem *ioaddr, int queue_num,
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int mtl_fifo);
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void (*mtl_set_rxfifosize)(void __iomem *ioaddr, int queue_num,
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int queue_fifo);
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void (*mtl_enable_txqueue)(void __iomem *ioaddr, int queue_num);
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void (*mtl_disable_txqueue)(void __iomem *ioaddr, int queue_num);
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void (*set_tx_mtl_mode)(void __iomem *ioaddr, int queue_num,
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int tx_mode);
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void (*set_rx_mtl_mode)(void __iomem *ioaddr, int queue_num,
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int rx_mode);
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void (*mtl_dynamic_dma_rxqueue)(void __iomem *ioaddr);
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void (*mtl_fc_active)(void __iomem *ioaddr, int queue_num,
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int threshold);
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void (*mtl_fc_deactive)(void __iomem *ioaddr, int queue_num,
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int threshold);
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void (*mtl_fc_enable)(void __iomem *ioaddr, int queue_num);
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void (*mtl_fep_enable)(void __iomem *ioaddr, int queue_num);
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void (*mtl_fep_disable)(void __iomem *ioaddr, int queue_num);
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void (*mtl_fup_enable)(void __iomem *ioaddr, int queue_num);
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void (*mtl_fup_disable)(void __iomem *ioaddr, int queue_num);
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};
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const struct sxgbe_mtl_ops *sxgbe_get_mtl_ops(void);
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#endif /* __SXGBE_MTL_H__ */
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