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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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696173b064
It used to be handy that we only had a couple of headers, but over time intel_drv.h has become unwieldy. Extract declarations to a separate header file corresponding to the implementation module, clarifying the modularity of the driver. Ensure the new header is self-contained, and do so with minimal further includes, using forward declarations as needed. Include the new header only where needed, and sort the modified include directives while at it and as needed. No functional changes. v2: gen6_rps_reset_ei() is in i915_irq.c not intel_pm.c. Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/adc6463b95eef3440fba9826793f7d1c5f3b0b4a.1554461791.git.jani.nikula@intel.com
72 lines
2.9 KiB
C
72 lines
2.9 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_PM_H__
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#define __INTEL_PM_H__
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#include <linux/types.h>
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struct drm_atomic_state;
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struct drm_device;
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struct drm_i915_private;
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struct i915_request;
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struct intel_crtc;
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struct intel_crtc_state;
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struct intel_plane;
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struct skl_ddb_allocation;
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struct skl_ddb_entry;
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struct skl_pipe_wm;
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struct skl_wm_level;
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void intel_init_clock_gating(struct drm_i915_private *dev_priv);
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void intel_suspend_hw(struct drm_i915_private *dev_priv);
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int ilk_wm_max_level(const struct drm_i915_private *dev_priv);
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void intel_update_watermarks(struct intel_crtc *crtc);
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void intel_init_pm(struct drm_i915_private *dev_priv);
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void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv);
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void intel_pm_setup(struct drm_i915_private *dev_priv);
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void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
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void intel_gpu_ips_teardown(void);
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void intel_init_gt_powersave(struct drm_i915_private *dev_priv);
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void intel_cleanup_gt_powersave(struct drm_i915_private *dev_priv);
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void intel_sanitize_gt_powersave(struct drm_i915_private *dev_priv);
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void intel_enable_gt_powersave(struct drm_i915_private *dev_priv);
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void intel_disable_gt_powersave(struct drm_i915_private *dev_priv);
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void gen6_rps_busy(struct drm_i915_private *dev_priv);
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void gen6_rps_idle(struct drm_i915_private *dev_priv);
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void gen6_rps_boost(struct i915_request *rq);
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void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv);
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void vlv_wm_get_hw_state(struct drm_i915_private *dev_priv);
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void ilk_wm_get_hw_state(struct drm_i915_private *dev_priv);
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void skl_wm_get_hw_state(struct drm_i915_private *dev_priv);
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void skl_pipe_ddb_get_hw_state(struct intel_crtc *crtc,
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struct skl_ddb_entry *ddb_y,
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struct skl_ddb_entry *ddb_uv);
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void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv,
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struct skl_ddb_allocation *ddb /* out */);
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void skl_pipe_wm_get_hw_state(struct intel_crtc *crtc,
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struct skl_pipe_wm *out);
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void g4x_wm_sanitize(struct drm_i915_private *dev_priv);
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void vlv_wm_sanitize(struct drm_i915_private *dev_priv);
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bool intel_can_enable_sagv(struct drm_atomic_state *state);
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int intel_enable_sagv(struct drm_i915_private *dev_priv);
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int intel_disable_sagv(struct drm_i915_private *dev_priv);
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bool skl_wm_level_equals(const struct skl_wm_level *l1,
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const struct skl_wm_level *l2);
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bool skl_ddb_allocation_overlaps(const struct skl_ddb_entry *ddb,
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const struct skl_ddb_entry *entries,
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int num_entries, int ignore_idx);
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void skl_write_plane_wm(struct intel_plane *plane,
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const struct intel_crtc_state *crtc_state);
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void skl_write_cursor_wm(struct intel_plane *plane,
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const struct intel_crtc_state *crtc_state);
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bool ilk_disable_lp_wm(struct drm_device *dev);
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int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc,
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struct intel_crtc_state *cstate);
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void intel_init_ipc(struct drm_i915_private *dev_priv);
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void intel_enable_ipc(struct drm_i915_private *dev_priv);
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#endif /* __INTEL_PM_H__ */
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