linux_dsm_epyc7002/arch/arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi
Greg Kroah-Hartman b24413180f License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.

By default all files without license information are under the default
license of the kernel, which is GPL version 2.

Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier.  The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.

This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.

How this work was done:

Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
 - file had no licensing information it it.
 - file was a */uapi/* one with no licensing information in it,
 - file was a */uapi/* one with existing licensing information,

Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.

The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne.  Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.

The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed.  Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.

Criteria used to select files for SPDX license identifier tagging was:
 - Files considered eligible had to be source code files.
 - Make and config files were included as candidates if they contained >5
   lines of source
 - File already had some variant of a license header in it (even if <5
   lines).

All documentation files were explicitly excluded.

The following heuristics were used to determine which SPDX license
identifiers to apply.

 - when both scanners couldn't find any license traces, file was
   considered to have no license information in it, and the top level
   COPYING file license applied.

   For non */uapi/* files that summary was:

   SPDX license identifier                            # files
   ---------------------------------------------------|-------
   GPL-2.0                                              11139

   and resulted in the first patch in this series.

   If that file was a */uapi/* path one, it was "GPL-2.0 WITH
   Linux-syscall-note" otherwise it was "GPL-2.0".  Results of that was:

   SPDX license identifier                            # files
   ---------------------------------------------------|-------
   GPL-2.0 WITH Linux-syscall-note                        930

   and resulted in the second patch in this series.

 - if a file had some form of licensing information in it, and was one
   of the */uapi/* ones, it was denoted with the Linux-syscall-note if
   any GPL family license was found in the file or had no licensing in
   it (per prior point).  Results summary:

   SPDX license identifier                            # files
   ---------------------------------------------------|------
   GPL-2.0 WITH Linux-syscall-note                       270
   GPL-2.0+ WITH Linux-syscall-note                      169
   ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause)    21
   ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)    17
   LGPL-2.1+ WITH Linux-syscall-note                      15
   GPL-1.0+ WITH Linux-syscall-note                       14
   ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause)    5
   LGPL-2.0+ WITH Linux-syscall-note                       4
   LGPL-2.1 WITH Linux-syscall-note                        3
   ((GPL-2.0 WITH Linux-syscall-note) OR MIT)              3
   ((GPL-2.0 WITH Linux-syscall-note) AND MIT)             1

   and that resulted in the third patch in this series.

 - when the two scanners agreed on the detected license(s), that became
   the concluded license(s).

 - when there was disagreement between the two scanners (one detected a
   license but the other didn't, or they both detected different
   licenses) a manual inspection of the file occurred.

 - In most cases a manual inspection of the information in the file
   resulted in a clear resolution of the license that should apply (and
   which scanner probably needed to revisit its heuristics).

 - When it was not immediately clear, the license identifier was
   confirmed with lawyers working with the Linux Foundation.

 - If there was any question as to the appropriate license identifier,
   the file was flagged for further research and to be revisited later
   in time.

In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.

Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights.  The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.

Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.

In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.

Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
 - a full scancode scan run, collecting the matched texts, detected
   license ids and scores
 - reviewing anything where there was a license detected (about 500+
   files) to ensure that the applied SPDX license was correct
 - reviewing anything where there was no detection but the patch license
   was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
   SPDX license was correct

This produced a worksheet with 20 files needing minor correction.  This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.

These .csv files were then reviewed by Greg.  Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected.  This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.)  Finally Greg ran the script using the .csv files to
generate the patches.

Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-02 11:10:55 +01:00

1061 lines
21 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0
/*
* pinctrl dts fils for Hislicon HiKey960 development board
*
*/
#include <dt-bindings/pinctrl/hisi.h>
/ {
soc {
/* [IOMG_000, IOMG_123] */
range: gpio-range {
#pinctrl-single,gpio-range-cells = <3>;
};
pmx0: pinmux@e896c000 {
compatible = "pinctrl-single";
reg = <0x0 0xe896c000 0x0 0x1f0>;
#pinctrl-cells = <1>;
#gpio-range-cells = <0x3>;
pinctrl-single,register-width = <0x20>;
pinctrl-single,function-mask = <0x7>;
/* pin base, nr pins & gpio function */
pinctrl-single,gpio-range = <
&range 0 7 0
&range 8 116 0>;
pmu_pmx_func: pmu_pmx_func {
pinctrl-single,pins = <
0x008 MUX_M1 /* PMU1_SSI */
0x00c MUX_M1 /* PMU2_SSI */
0x010 MUX_M1 /* PMU_CLKOUT */
0x100 MUX_M1 /* PMU_HKADC_SSI */
>;
};
csi0_pwd_n_pmx_func: csi0_pwd_n_pmx_func {
pinctrl-single,pins = <
0x044 MUX_M0 /* CSI0_PWD_N */
>;
};
csi1_pwd_n_pmx_func: csi1_pwd_n_pmx_func {
pinctrl-single,pins = <
0x04c MUX_M0 /* CSI1_PWD_N */
>;
};
isp0_pmx_func: isp0_pmx_func {
pinctrl-single,pins = <
0x058 MUX_M1 /* ISP_CLK0 */
0x064 MUX_M1 /* ISP_SCL0 */
0x068 MUX_M1 /* ISP_SDA0 */
>;
};
isp1_pmx_func: isp1_pmx_func {
pinctrl-single,pins = <
0x05c MUX_M1 /* ISP_CLK1 */
0x06c MUX_M1 /* ISP_SCL1 */
0x070 MUX_M1 /* ISP_SDA1 */
>;
};
pwr_key_pmx_func: pwr_key_pmx_func {
pinctrl-single,pins = <
0x080 MUX_M0 /* GPIO_034 */
>;
};
i2c3_pmx_func: i2c3_pmx_func {
pinctrl-single,pins = <
0x02c MUX_M1 /* I2C3_SCL */
0x030 MUX_M1 /* I2C3_SDA */
>;
};
i2c4_pmx_func: i2c4_pmx_func {
pinctrl-single,pins = <
0x090 MUX_M1 /* I2C4_SCL */
0x094 MUX_M1 /* I2C4_SDA */
>;
};
pcie_perstn_pmx_func: pcie_perstn_pmx_func {
pinctrl-single,pins = <
0x15c MUX_M1 /* PCIE_PERST_N */
>;
};
usbhub5734_pmx_func: usbhub5734_pmx_func {
pinctrl-single,pins = <
0x11c MUX_M0 /* GPIO_073 */
0x120 MUX_M0 /* GPIO_074 */
>;
};
uart0_pmx_func: uart0_pmx_func {
pinctrl-single,pins = <
0x0cc MUX_M2 /* UART0_RXD */
0x0d0 MUX_M2 /* UART0_TXD */
>;
};
uart1_pmx_func: uart1_pmx_func {
pinctrl-single,pins = <
0x0b0 MUX_M2 /* UART1_CTS_N */
0x0b4 MUX_M2 /* UART1_RTS_N */
0x0a8 MUX_M2 /* UART1_RXD */
0x0ac MUX_M2 /* UART1_TXD */
>;
};
uart2_pmx_func: uart2_pmx_func {
pinctrl-single,pins = <
0x0bc MUX_M2 /* UART2_CTS_N */
0x0c0 MUX_M2 /* UART2_RTS_N */
0x0c8 MUX_M2 /* UART2_RXD */
0x0c4 MUX_M2 /* UART2_TXD */
>;
};
uart3_pmx_func: uart3_pmx_func {
pinctrl-single,pins = <
0x0dc MUX_M1 /* UART3_CTS_N */
0x0e0 MUX_M1 /* UART3_RTS_N */
0x0e4 MUX_M1 /* UART3_RXD */
0x0e8 MUX_M1 /* UART3_TXD */
>;
};
uart4_pmx_func: uart4_pmx_func {
pinctrl-single,pins = <
0x0ec MUX_M1 /* UART4_CTS_N */
0x0f0 MUX_M1 /* UART4_RTS_N */
0x0f4 MUX_M1 /* UART4_RXD */
0x0f8 MUX_M1 /* UART4_TXD */
>;
};
uart5_pmx_func: uart5_pmx_func {
pinctrl-single,pins = <
0x0c4 MUX_M3 /* UART5_CTS_N */
0x0c8 MUX_M3 /* UART5_RTS_N */
0x0bc MUX_M3 /* UART5_RXD */
0x0c0 MUX_M3 /* UART5_TXD */
>;
};
uart6_pmx_func: uart6_pmx_func {
pinctrl-single,pins = <
0x0cc MUX_M1 /* UART6_CTS_N */
0x0d0 MUX_M1 /* UART6_RTS_N */
0x0d4 MUX_M1 /* UART6_RXD */
0x0d8 MUX_M1 /* UART6_TXD */
>;
};
cam0_rst_pmx_func: cam0_rst_pmx_func {
pinctrl-single,pins = <
0x0c8 MUX_M0 /* CAM0_RST */
>;
};
cam1_rst_pmx_func: cam1_rst_pmx_func {
pinctrl-single,pins = <
0x124 MUX_M0 /* CAM1_RST */
>;
};
};
/* [IOMG_MMC0_000, IOMG_MMC0_005] */
pmx1: pinmux@ff37e000 {
compatible = "pinctrl-single";
reg = <0x0 0xff37e000 0x0 0x18>;
#gpio-range-cells = <0x3>;
#pinctrl-cells = <1>;
pinctrl-single,register-width = <0x20>;
pinctrl-single,function-mask = <0x7>;
/* pin base, nr pins & gpio function */
pinctrl-single,gpio-range = <&range 0 6 0>;
sd_pmx_func: sd_pmx_func {
pinctrl-single,pins = <
0x000 MUX_M1 /* SD_CLK */
0x004 MUX_M1 /* SD_CMD */
0x008 MUX_M1 /* SD_DATA0 */
0x00c MUX_M1 /* SD_DATA1 */
0x010 MUX_M1 /* SD_DATA2 */
0x014 MUX_M1 /* SD_DATA3 */
>;
};
};
/* [IOMG_FIX_000, IOMG_FIX_011] */
pmx2: pinmux@ff3b6000 {
compatible = "pinctrl-single";
reg = <0x0 0xff3b6000 0x0 0x30>;
#pinctrl-cells = <1>;
#gpio-range-cells = <0x3>;
pinctrl-single,register-width = <0x20>;
pinctrl-single,function-mask = <0x7>;
/* pin base, nr pins & gpio function */
pinctrl-single,gpio-range = <&range 0 12 0>;
ufs_pmx_func: ufs_pmx_func {
pinctrl-single,pins = <
0x000 MUX_M1 /* UFS_REF_CLK */
0x004 MUX_M1 /* UFS_RST_N */
>;
};
spi3_pmx_func: spi3_pmx_func {
pinctrl-single,pins = <
0x008 MUX_M1 /* SPI3_CLK */
0x00c MUX_M1 /* SPI3_DI */
0x010 MUX_M1 /* SPI3_DO */
0x014 MUX_M1 /* SPI3_CS0_N */
>;
};
};
/* [IOMG_MMC1_000, IOMG_MMC1_005] */
pmx3: pinmux@ff3fd000 {
compatible = "pinctrl-single";
reg = <0x0 0xff3fd000 0x0 0x18>;
#pinctrl-cells = <1>;
#gpio-range-cells = <0x3>;
pinctrl-single,register-width = <0x20>;
pinctrl-single,function-mask = <0x7>;
/* pin base, nr pins & gpio function */
pinctrl-single,gpio-range = <&range 0 6 0>;
sdio_pmx_func: sdio_pmx_func {
pinctrl-single,pins = <
0x000 MUX_M1 /* SDIO_CLK */
0x004 MUX_M1 /* SDIO_CMD */
0x008 MUX_M1 /* SDIO_DATA0 */
0x00c MUX_M1 /* SDIO_DATA1 */
0x010 MUX_M1 /* SDIO_DATA2 */
0x014 MUX_M1 /* SDIO_DATA3 */
>;
};
};
/* [IOMG_AO_000, IOMG_AO_041] */
pmx4: pinmux@fff11000 {
compatible = "pinctrl-single";
reg = <0x0 0xfff11000 0x0 0xa8>;
#pinctrl-cells = <1>;
#gpio-range-cells = <0x3>;
pinctrl-single,register-width = <0x20>;
pinctrl-single,function-mask = <0x7>;
/* pin base in node, nr pins & gpio function */
pinctrl-single,gpio-range = <&range 0 42 0>;
i2s2_pmx_func: i2s2_pmx_func {
pinctrl-single,pins = <
0x044 MUX_M1 /* I2S2_DI */
0x048 MUX_M1 /* I2S2_DO */
0x04c MUX_M1 /* I2S2_XCLK */
0x050 MUX_M1 /* I2S2_XFS */
>;
};
slimbus_pmx_func: slimbus_pmx_func {
pinctrl-single,pins = <
0x02c MUX_M1 /* SLIMBUS_CLK */
0x030 MUX_M1 /* SLIMBUS_DATA */
>;
};
i2c0_pmx_func: i2c0_pmx_func {
pinctrl-single,pins = <
0x014 MUX_M1 /* I2C0_SCL */
0x018 MUX_M1 /* I2C0_SDA */
>;
};
i2c1_pmx_func: i2c1_pmx_func {
pinctrl-single,pins = <
0x01c MUX_M1 /* I2C1_SCL */
0x020 MUX_M1 /* I2C1_SDA */
>;
};
i2c7_pmx_func: i2c7_pmx_func {
pinctrl-single,pins = <
0x024 MUX_M3 /* I2C7_SCL */
0x028 MUX_M3 /* I2C7_SDA */
>;
};
pcie_pmx_func: pcie_pmx_func {
pinctrl-single,pins = <
0x084 MUX_M1 /* PCIE_CLKREQ_N */
0x088 MUX_M1 /* PCIE_WAKE_N */
>;
};
spi2_pmx_func: spi2_pmx_func {
pinctrl-single,pins = <
0x08c MUX_M1 /* SPI2_CLK */
0x090 MUX_M1 /* SPI2_DI */
0x094 MUX_M1 /* SPI2_DO */
0x098 MUX_M1 /* SPI2_CS0_N */
>;
};
i2s0_pmx_func: i2s0_pmx_func {
pinctrl-single,pins = <
0x034 MUX_M1 /* I2S0_DI */
0x038 MUX_M1 /* I2S0_DO */
0x03c MUX_M1 /* I2S0_XCLK */
0x040 MUX_M1 /* I2S0_XFS */
>;
};
};
pmx5: pinmux@e896c800 {
compatible = "pinconf-single";
reg = <0x0 0xe896c800 0x0 0x200>;
#pinctrl-cells = <1>;
pinctrl-single,register-width = <0x20>;
pmu_cfg_func: pmu_cfg_func {
pinctrl-single,pins = <
0x010 0x0 /* PMU1_SSI */
0x014 0x0 /* PMU2_SSI */
0x018 0x0 /* PMU_CLKOUT */
0x10c 0x0 /* PMU_HKADC_SSI */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_DIS
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_06MA DRIVE6_MASK
>;
};
i2c3_cfg_func: i2c3_cfg_func {
pinctrl-single,pins = <
0x038 0x0 /* I2C3_SCL */
0x03c 0x0 /* I2C3_SDA */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_DIS
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_02MA DRIVE6_MASK
>;
};
csi0_pwd_n_cfg_func: csi0_pwd_n_cfg_func {
pinctrl-single,pins = <
0x050 0x0 /* CSI0_PWD_N */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_DIS
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_04MA DRIVE6_MASK
>;
};
csi1_pwd_n_cfg_func: csi1_pwd_n_cfg_func {
pinctrl-single,pins = <
0x058 0x0 /* CSI1_PWD_N */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_DIS
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_04MA DRIVE6_MASK
>;
};
isp0_cfg_func: isp0_cfg_func {
pinctrl-single,pins = <
0x064 0x0 /* ISP_CLK0 */
0x070 0x0 /* ISP_SCL0 */
0x074 0x0 /* ISP_SDA0 */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_DIS
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_04MA DRIVE6_MASK>;
};
isp1_cfg_func: isp1_cfg_func {
pinctrl-single,pins = <
0x068 0x0 /* ISP_CLK1 */
0x078 0x0 /* ISP_SCL1 */
0x07c 0x0 /* ISP_SDA1 */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_DIS
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_04MA DRIVE6_MASK
>;
};
pwr_key_cfg_func: pwr_key_cfg_func {
pinctrl-single,pins = <
0x08c 0x0 /* GPIO_034 */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_DIS
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_02MA DRIVE6_MASK
>;
};
uart1_cfg_func: uart1_cfg_func {
pinctrl-single,pins = <
0x0b4 0x0 /* UART1_RXD */
0x0b8 0x0 /* UART1_TXD */
0x0bc 0x0 /* UART1_CTS_N */
0x0c0 0x0 /* UART1_RTS_N */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_DIS
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_02MA DRIVE6_MASK
>;
};
uart2_cfg_func: uart2_cfg_func {
pinctrl-single,pins = <
0x0c8 0x0 /* UART2_CTS_N */
0x0cc 0x0 /* UART2_RTS_N */
0x0d0 0x0 /* UART2_TXD */
0x0d4 0x0 /* UART2_RXD */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_DIS
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_02MA DRIVE6_MASK
>;
};
uart5_cfg_func: uart5_cfg_func {
pinctrl-single,pins = <
0x0c8 0x0 /* UART5_RXD */
0x0cc 0x0 /* UART5_TXD */
0x0d0 0x0 /* UART5_CTS_N */
0x0d4 0x0 /* UART5_RTS_N */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_DIS
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_02MA DRIVE6_MASK
>;
};
cam0_rst_cfg_func: cam0_rst_cfg_func {
pinctrl-single,pins = <
0x0d4 0x0 /* CAM0_RST */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_DIS
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_04MA DRIVE6_MASK
>;
};
uart0_cfg_func: uart0_cfg_func {
pinctrl-single,pins = <
0x0d8 0x0 /* UART0_RXD */
0x0dc 0x0 /* UART0_TXD */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_DIS
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_02MA DRIVE6_MASK
>;
};
uart6_cfg_func: uart6_cfg_func {
pinctrl-single,pins = <
0x0d8 0x0 /* UART6_CTS_N */
0x0dc 0x0 /* UART6_RTS_N */
0x0e0 0x0 /* UART6_RXD */
0x0e4 0x0 /* UART6_TXD */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_DIS
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_02MA DRIVE6_MASK
>;
};
uart3_cfg_func: uart3_cfg_func {
pinctrl-single,pins = <
0x0e8 0x0 /* UART3_CTS_N */
0x0ec 0x0 /* UART3_RTS_N */
0x0f0 0x0 /* UART3_RXD */
0x0f4 0x0 /* UART3_TXD */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_DIS
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_02MA DRIVE6_MASK
>;
};
uart4_cfg_func: uart4_cfg_func {
pinctrl-single,pins = <
0x0f8 0x0 /* UART4_CTS_N */
0x0fc 0x0 /* UART4_RTS_N */
0x100 0x0 /* UART4_RXD */
0x104 0x0 /* UART4_TXD */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_DIS
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_02MA DRIVE6_MASK
>;
};
cam1_rst_cfg_func: cam1_rst_cfg_func {
pinctrl-single,pins = <
0x130 0x0 /* CAM1_RST */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_DIS
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_04MA DRIVE6_MASK
>;
};
};
pmx6: pinmux@ff3b6800 {
compatible = "pinconf-single";
reg = <0x0 0xff3b6800 0x0 0x18>;
#pinctrl-cells = <1>;
pinctrl-single,register-width = <0x20>;
ufs_cfg_func: ufs_cfg_func {
pinctrl-single,pins = <
0x000 0x0 /* UFS_REF_CLK */
0x004 0x0 /* UFS_RST_N */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_DIS
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_08MA DRIVE6_MASK
>;
};
spi3_cfg_func: spi3_cfg_func {
pinctrl-single,pins = <
0x008 0x0 /* SPI3_CLK */
0x0 /* SPI3_DI */
0x010 0x0 /* SPI3_DO */
0x014 0x0 /* SPI3_CS0_N */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_DIS
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_02MA DRIVE6_MASK
>;
};
};
pmx7: pinmux@ff3fd800 {
compatible = "pinconf-single";
reg = <0x0 0xff3fd800 0x0 0x18>;
#pinctrl-cells = <1>;
pinctrl-single,register-width = <0x20>;
sdio_clk_cfg_func: sdio_clk_cfg_func {
pinctrl-single,pins = <
0x000 0x0 /* SDIO_CLK */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_DIS
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE6_32MA DRIVE6_MASK
>;
};
sdio_cfg_func: sdio_cfg_func {
pinctrl-single,pins = <
0x004 0x0 /* SDIO_CMD */
0x008 0x0 /* SDIO_DATA0 */
0x00c 0x0 /* SDIO_DATA1 */
0x010 0x0 /* SDIO_DATA2 */
0x014 0x0 /* SDIO_DATA3 */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_UP
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE6_19MA DRIVE6_MASK
>;
};
};
pmx8: pinmux@ff37e800 {
compatible = "pinconf-single";
reg = <0x0 0xff37e800 0x0 0x18>;
#pinctrl-cells = <1>;
pinctrl-single,register-width = <0x20>;
sd_clk_cfg_func: sd_clk_cfg_func {
pinctrl-single,pins = <
0x000 0x0 /* SD_CLK */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_DIS
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE6_32MA
DRIVE6_MASK
>;
};
sd_cfg_func: sd_cfg_func {
pinctrl-single,pins = <
0x004 0x0 /* SD_CMD */
0x008 0x0 /* SD_DATA0 */
0x00c 0x0 /* SD_DATA1 */
0x010 0x0 /* SD_DATA2 */
0x014 0x0 /* SD_DATA3 */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_UP
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE6_19MA
DRIVE6_MASK
>;
};
};
pmx9: pinmux@fff11800 {
compatible = "pinconf-single";
reg = <0x0 0xfff11800 0x0 0xbc>;
#pinctrl-cells = <1>;
pinctrl-single,register-width = <0x20>;
i2c0_cfg_func: i2c0_cfg_func {
pinctrl-single,pins = <
0x01c 0x0 /* I2C0_SCL */
0x020 0x0 /* I2C0_SDA */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_UP
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_02MA DRIVE6_MASK
>;
};
i2c1_cfg_func: i2c1_cfg_func {
pinctrl-single,pins = <
0x024 0x0 /* I2C1_SCL */
0x028 0x0 /* I2C1_SDA */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_UP
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_02MA DRIVE6_MASK
>;
};
i2c7_cfg_func: i2c7_cfg_func {
pinctrl-single,pins = <
0x02c 0x0 /* I2C7_SCL */
0x030 0x0 /* I2C7_SDA */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_UP
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_02MA DRIVE6_MASK
>;
};
slimbus_cfg_func: slimbus_cfg_func {
pinctrl-single,pins = <
0x034 0x0 /* SLIMBUS_CLK */
0x038 0x0 /* SLIMBUS_DATA */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_UP
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_02MA DRIVE6_MASK
>;
};
i2s0_cfg_func: i2s0_cfg_func {
pinctrl-single,pins = <
0x040 0x0 /* I2S0_DI */
0x044 0x0 /* I2S0_DO */
0x048 0x0 /* I2S0_XCLK */
0x04c 0x0 /* I2S0_XFS */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_UP
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_02MA DRIVE6_MASK
>;
};
i2s2_cfg_func: i2s2_cfg_func {
pinctrl-single,pins = <
0x050 0x0 /* I2S2_DI */
0x054 0x0 /* I2S2_DO */
0x058 0x0 /* I2S2_XCLK */
0x05c 0x0 /* I2S2_XFS */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_UP
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_02MA DRIVE6_MASK
>;
};
pcie_cfg_func: pcie_cfg_func {
pinctrl-single,pins = <
0x094 0x0 /* PCIE_CLKREQ_N */
0x098 0x0 /* PCIE_WAKE_N */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_UP
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_02MA DRIVE6_MASK
>;
};
spi2_cfg_func: spi2_cfg_func {
pinctrl-single,pins = <
0x09c 0x0 /* SPI2_CLK */
0x0a0 0x0 /* SPI2_DI */
0x0a4 0x0 /* SPI2_DO */
0x0a8 0x0 /* SPI2_CS0_N */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_UP
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_02MA DRIVE6_MASK
>;
};
usb_cfg_func: usb_cfg_func {
pinctrl-single,pins = <
0x0ac 0x0 /* GPIO_219 */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_UP
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_02MA DRIVE6_MASK
>;
};
};
};
};