Linus Torvalds 78f8601354 Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip ... Pull irq updates from Thomas Gleixner: "The interrupt departement delivers this time: - New infrastructure to manage NMIs on platforms which have a sane NMI delivery, i.e. identifiable NMI vectors instead of a single lump. - Simplification of the interrupt affinity management so drivers don't have to implement ugly loops around the PCI/MSI enablement. - Speedup for interrupt statistics in /proc/stat - Provide a function to retrieve the default irq domain - A new interrupt controller for the Loongson LS1X platform - Affinity support for the SiFive PLIC - Better support for the iMX irqsteer driver - NUMA aware memory allocations for GICv3 - The usual small fixes, improvements and cleanups all over the place" * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (36 commits) irqchip/imx-irqsteer: Add multi output interrupts support irqchip/imx-irqsteer: Change to use reg_num instead of irq_group dt-bindings: irq: imx-irqsteer: Add multi output interrupts support dt-binding: irq: imx-irqsteer: Use irq number instead of group number irqchip/brcmstb-l2: Use _irqsave locking variants in non-interrupt code irqchip/gicv3-its: Use NUMA aware memory allocation for ITS tables irqdomain: Allow the default irq domain to be retrieved irqchip/sifive-plic: Implement irq_set_affinity() for SMP host irqchip/sifive-plic: Differentiate between PLIC handler and context irqchip/sifive-plic: Add warning in plic_init() if handler already present irqchip/sifive-plic: Pre-compute context hart base and enable base PCI/MSI: Remove obsolete sanity checks for multiple interrupt sets genirq/affinity: Remove the leftovers of the original set support nvme-pci: Simplify interrupt allocation genirq/affinity: Add new callback for (re)calculating interrupt sets genirq/affinity: Store interrupt sets size in struct irq_affinity genirq/affinity: Code consolidation irqchip/irq-sifive-plic: Check and continue in case of an invalid cpuid. irqchip/i8259: Fix shutdown order by moving syscore_ops registration dt-bindings: interrupt-controller: loongson ls1x intc ...		2019-03-05 12:21:47 -08:00
..
controller	pci-v5.0-fixes-3	2019-01-31 23:06:17 -08:00
endpoint
hotplug
pcie	pci-v4.21-changes	2019-01-05 17:57:34 -08:00
switch	cross-tree: phase out dma_zalloc_coherent()	2019-01-08 07:58:37 -05:00
access.c
ats.c
bus.c
ecam.c
host-bridge.c
iov.c	PCI/IOV: Add flag so platforms can skip VF scanning	2019-01-01 19:04:37 -06:00
irq.c
Kconfig	PCI: Fix PCI kconfig menu organization	2019-01-14 17:01:20 -06:00
Makefile
mmap.c
msi.c	PCI/MSI: Remove obsolete sanity checks for multiple interrupt sets	2019-02-18 11:21:29 +01:00
of.c
p2pdma.c	pci-v4.21-changes	2019-01-05 17:57:34 -08:00
pci-acpi.c
pci-bridge-emul.c
pci-bridge-emul.h
pci-driver.c	pci-v4.21-changes	2019-01-05 17:57:34 -08:00
pci-label.c
pci-mid.c
pci-pf-stub.c
pci-stub.c
pci-sysfs.c
pci.c	PCI: Fix __initdata issue with "pci=disable_acs_redir" parameter	2019-01-17 08:46:34 -06:00
pci.h
probe.c
proc.c	Remove 'type' argument from access_ok() function	2019-01-03 18:57:57 -08:00
quirks.c	PCI: Work around Synopsys duplicate Device ID (HAPS USB3, NXP i.MX)	2019-02-06 17:17:27 -06:00
remove.c
rom.c
search.c
setup-bus.c
setup-irq.c
setup-res.c
slot.c
syscall.c
vc.c
vpd.c
xen-pcifront.c