mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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2c799cef4d
This is needed to minimize io.h so the SoC specific io.h for ARMs can removed. Note that minimal driver changes for DSS and RNG are needed to include cpu.h for SoC detection macros. Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Matt Mackall <mpm@selenic.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Tony Lindgren <tony@atomide.com>
122 lines
3.3 KiB
C
122 lines
3.3 KiB
C
/*
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* OMAP 32ksynctimer/counter_32k-related code
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*
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* Copyright (C) 2009 Texas Instruments
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* Copyright (C) 2010 Nokia Corporation
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* Tony Lindgren <tony@atomide.com>
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* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* NOTE: This timer is not the same timer as the old OMAP1 MPU timer.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/clocksource.h>
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#include <asm/sched_clock.h>
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#include <plat/hardware.h>
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#include <plat/common.h>
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#include <plat/board.h>
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#include <plat/clock.h>
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/*
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* 32KHz clocksource ... always available, on pretty most chips except
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* OMAP 730 and 1510. Other timers could be used as clocksources, with
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* higher resolution in free-running counter modes (e.g. 12 MHz xtal),
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* but systems won't necessarily want to spend resources that way.
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*/
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static void __iomem *timer_32k_base;
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#define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410
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static u32 notrace omap_32k_read_sched_clock(void)
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{
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return timer_32k_base ? __raw_readl(timer_32k_base) : 0;
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}
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/**
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* read_persistent_clock - Return time from a persistent clock.
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*
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* Reads the time from a source which isn't disabled during PM, the
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* 32k sync timer. Convert the cycles elapsed since last read into
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* nsecs and adds to a monotonically increasing timespec.
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*/
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static struct timespec persistent_ts;
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static cycles_t cycles, last_cycles;
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static unsigned int persistent_mult, persistent_shift;
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void read_persistent_clock(struct timespec *ts)
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{
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unsigned long long nsecs;
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cycles_t delta;
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struct timespec *tsp = &persistent_ts;
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last_cycles = cycles;
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cycles = timer_32k_base ? __raw_readl(timer_32k_base) : 0;
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delta = cycles - last_cycles;
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nsecs = clocksource_cyc2ns(delta, persistent_mult, persistent_shift);
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timespec_add_ns(tsp, nsecs);
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*ts = *tsp;
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}
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int __init omap_init_clocksource_32k(void)
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{
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static char err[] __initdata = KERN_ERR
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"%s: can't register clocksource!\n";
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if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
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u32 pbase;
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unsigned long size = SZ_4K;
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void __iomem *base;
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struct clk *sync_32k_ick;
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if (cpu_is_omap16xx()) {
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pbase = OMAP16XX_TIMER_32K_SYNCHRONIZED;
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size = SZ_1K;
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} else if (cpu_is_omap2420())
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pbase = OMAP2420_32KSYNCT_BASE + 0x10;
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else if (cpu_is_omap2430())
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pbase = OMAP2430_32KSYNCT_BASE + 0x10;
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else if (cpu_is_omap34xx())
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pbase = OMAP3430_32KSYNCT_BASE + 0x10;
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else if (cpu_is_omap44xx())
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pbase = OMAP4430_32KSYNCT_BASE + 0x10;
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else
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return -ENODEV;
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/* For this to work we must have a static mapping in io.c for this area */
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base = ioremap(pbase, size);
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if (!base)
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return -ENODEV;
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sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
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if (!IS_ERR(sync_32k_ick))
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clk_enable(sync_32k_ick);
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timer_32k_base = base;
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/*
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* 120000 rough estimate from the calculations in
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* __clocksource_updatefreq_scale.
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*/
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clocks_calc_mult_shift(&persistent_mult, &persistent_shift,
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32768, NSEC_PER_SEC, 120000);
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if (clocksource_mmio_init(base, "32k_counter", 32768, 250, 32,
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clocksource_mmio_readl_up))
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printk(err, "32k_counter");
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setup_sched_clock(omap_32k_read_sched_clock, 32, 32768);
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}
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return 0;
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}
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