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10a6e1832b
We need set-rate-parent flags for the display's clock path so that the DSS driver can change the clock rate of the PLL. This patchs adds the ti,set-rate-parent flag to disp_clk and dpll_disp_m2_ck clock nodes. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> |
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install.sh | ||
Makefile |