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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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1009aa1205
This tag contains some major improvements to the RISC-V port, including
the necessary interrupt controller and timer support to actually make it
to userspace. Support for three devices has been added:
* Support for the ISA-mandated timers on RISC-V systems.
* Support for the ISA-mandated first-level interrupt controller on
RISC-V systems, which is handled as part of our core arch code because
it's very small and tightly tied to the ISA.
* Support for SiFive's platform-level interrupt controller, which talks
to the actual devices.
In addition to these new devices, there are a handful of cleanups all
over the RISC-V tree:
* Build fixes for various configurations
* A fix to the vDSO build's makefile so it respects CFLAGS.
* The addition of __lshrti3, a libgcc derived function necessary for
some 32-bit configurations.
* !SMP && PERF_EVENTS
* Cleanups to the arch code to remove the remnants of old versions of
the drivers that were just properly submitted.
* Some dead code from the timer driver, most of which wasn't ever
even compiled.
* Cleanups of some interrupt #defines, which are now local to the
interrupt handling code.
* Fixes to ptrace(), which while not being sufficient to fully make GDB
work are at least sufficient to get simple GDB tasks to work.
* Early printk support via RISC-V's architecturally mandated SBI console
device.
* A fix to our early debug trap handler to ensure it's always aligned.
These patches have all been through a fairly extensive review process,
but as this enables a whole pile of functionality (ie, userspace) I'm
confident we'll need to submit a few more patches. The only concrete
issues I know about are the sys_riscv_flush_icache patches, but as I
managed to screw those up on Friday I figured it'd be best to let them
bake another week.
This tag boots a Fedora root filesystem on QEMU's master branch for me,
and before this morning's rebase (from 4.18-rc8 to 4.18) it booted on
the HiFive Unleashed.
Thanks to Christoph Hellwig and the other guys at WD for getting the new
drivers in shape!
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Merge tag 'riscv-for-linus-4.19-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux
Pull RISC-V updates from Palmer Dabbelt:
"This contains some major improvements to the RISC-V port, including
the necessary interrupt controller and timer support to actually make
it to userspace. Support for three devices has been added:
- the ISA-mandated timers on RISC-V systems.
- the ISA-mandated first-level interrupt controller on RISC-V
systems, which is handled as part of our core arch code because
it's very small and tightly tied to the ISA.
- SiFive's platform-level interrupt controller, which talks to the
actual devices.
In addition to these new devices, there are a handful of cleanups all
over the RISC-V tree:
- build fixes for various configurations:
* A fix to the vDSO build's makefile so it respects CFLAGS.
* The addition of __lshrti3, a libgcc derived function necessary
for some 32-bit configurations.
* !SMP && PERF_EVENTS
- Cleanups to the arch code to remove the remnants of old versions of
the drivers that were just properly submitted.
* Some dead code from the timer driver, most of which wasn't ever
even compiled.
* Cleanups of some interrupt #defines, which are now local to the
interrupt handling code.
- Fixes to ptrace(), which while not being sufficient to fully make
GDB work are at least sufficient to get simple GDB tasks to work.
- Early printk support via RISC-V's architecturally mandated SBI
console device.
- A fix to our early debug trap handler to ensure it's always
aligned.
These patches have all been through a fairly extensive review process,
but as this enables a whole pile of functionality (ie, userspace) I'm
confident we'll need to submit a few more patches. The only concrete
issues I know about are the sys_riscv_flush_icache patches, but as I
managed to screw those up on Friday I figured it'd be best to let them
bake another week.
This tag boots a Fedora root filesystem on QEMU's master branch for
me, and before this morning's rebase (from 4.18-rc8 to 4.18) it booted
on the HiFive Unleashed.
Thanks to Christoph Hellwig and the other guys at WD for getting the
new drivers in shape!"
* tag 'riscv-for-linus-4.19-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux:
dt-bindings: interrupt-controller: SiFive Plaform Level Interrupt Controller
dt-bindings: interrupt-controller: RISC-V local interrupt controller
RISC-V: Fix !CONFIG_SMP compilation error
irqchip: add a SiFive PLIC driver
RISC-V: Add the directive for alignment of stvec's value
clocksource: new RISC-V SBI timer driver
RISC-V: implement low-level interrupt handling
RISC-V: add a definition for the SIE SEIE bit
RISC-V: remove INTERRUPT_CAUSE_* defines from asm/irq.h
RISC-V: simplify software interrupt / IPI code
RISC-V: remove timer leftovers
RISC-V: Add early printk support via the SBI console
RISC-V: Don't increment sepc after breakpoint.
RISC-V: implement __lshrti3.
RISC-V: Use KBUILD_CFLAGS instead of KCFLAGS when building the vDSO
|
||
|---|---|---|
| .. | ||
| abilis,tb10x-ictl.txt | ||
| al,alpine-msix.txt | ||
| allwinner,sun4i-ic.txt | ||
| allwinner,sunxi-nmi.txt | ||
| amlogic,meson-gpio-intc.txt | ||
| andestech,ativic32.txt | ||
| arm,gic-v3.txt | ||
| arm,gic.txt | ||
| arm,nvic.txt | ||
| arm,versatile-fpga-irq.txt | ||
| arm,vic.txt | ||
| aspeed,ast2400-i2c-ic.txt | ||
| aspeed,ast2400-vic.txt | ||
| atmel,aic.txt | ||
| brcm,bcm2835-armctrl-ic.txt | ||
| brcm,bcm2836-l1-intc.txt | ||
| brcm,bcm3380-l2-intc.txt | ||
| brcm,bcm6345-l1-intc.txt | ||
| brcm,bcm7038-l1-intc.txt | ||
| brcm,bcm7120-l2-intc.txt | ||
| brcm,l2-intc.txt | ||
| cdns,xtensa-mx.txt | ||
| cdns,xtensa-pic.txt | ||
| cirrus,clps711x-intc.txt | ||
| digicolor-ic.txt | ||
| ezchip,nps400-ic.txt | ||
| faraday,ftintc010.txt | ||
| fsl,ls-scfg-msi.txt | ||
| google,goldfish-pic.txt | ||
| hisilicon,mbigen-v2.txt | ||
| img,meta-intc.txt | ||
| img,pdc-intc.txt | ||
| ingenic,intc.txt | ||
| intel,ce4100-ioapic.txt | ||
| interrupts.txt | ||
| jcore,aic.txt | ||
| lsi,zevio-intc.txt | ||
| marvell,armada-8k-pic.txt | ||
| marvell,armada-370-xp-mpic.txt | ||
| marvell,gicp.txt | ||
| marvell,icu.txt | ||
| marvell,odmi-controller.txt | ||
| marvell,orion-intc.txt | ||
| mediatek,cirq.txt | ||
| mediatek,sysirq.txt | ||
| microchip,pic32-evic.txt | ||
| mips-gic.txt | ||
| mrvl,intc.txt | ||
| mscc,ocelot-icpu-intr.txt | ||
| msi.txt | ||
| nvidia,tegra20-ictlr.txt | ||
| nxp,lpc3220-mic.txt | ||
| open-pic.txt | ||
| opencores,or1k-pic.txt | ||
| openrisc,ompic.txt | ||
| qca,ath79-cpu-intc.txt | ||
| qca,ath79-misc-intc.txt | ||
| qcom,pdc.txt | ||
| renesas,h8s-intc.txt | ||
| renesas,h8300h-intc.txt | ||
| renesas,intc-irqpin.txt | ||
| renesas,irqc.txt | ||
| riscv,cpu-intc.txt | ||
| samsung,exynos4210-combiner.txt | ||
| samsung,s3c24xx-irq.txt | ||
| sifive,plic-1.0.0.txt | ||
| sigma,smp8642-intc.txt | ||
| snps,arc700-intc.txt | ||
| snps,archs-idu-intc.txt | ||
| snps,archs-intc.txt | ||
| snps,dw-apb-ictl.txt | ||
| socionext,synquacer-exiu.txt | ||
| socionext,uniphier-aidet.txt | ||
| st,spear3xx-shirq.txt | ||
| st,sti-irq-syscfg.txt | ||
| st,stm32-exti.txt | ||
| technologic,ts4800.txt | ||
| ti,c64x+megamod-pic.txt | ||
| ti,cp-intc.txt | ||
| ti,keystone-irq.txt | ||
| ti,omap2-intc.txt | ||
| ti,omap4-wugen-mpu | ||
| ti,omap-intc-irq.txt | ||
| via,vt8500-intc.txt | ||