mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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106 lines
3.1 KiB
C
106 lines
3.1 KiB
C
/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs <bskeggs@redhat.com>
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*/
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#include <nvif/os.h>
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#include <nvif/class.h>
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#include <nvif/cl0002.h>
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#include "nouveau_drv.h"
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#include "nouveau_dma.h"
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#include "nv10_fence.h"
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#include "nv50_display.h"
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static int
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nv50_fence_context_new(struct nouveau_channel *chan)
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{
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struct nv10_fence_priv *priv = chan->drm->fence;
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struct nv10_fence_chan *fctx;
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struct ttm_mem_reg *reg = &priv->bo->bo.mem;
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u32 start = reg->start * PAGE_SIZE;
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u32 limit = start + reg->size - 1;
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int ret;
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fctx = chan->fence = kzalloc(sizeof(*fctx), GFP_KERNEL);
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if (!fctx)
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return -ENOMEM;
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nouveau_fence_context_new(chan, &fctx->base);
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fctx->base.emit = nv10_fence_emit;
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fctx->base.read = nv10_fence_read;
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fctx->base.sync = nv17_fence_sync;
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ret = nvif_object_init(&chan->user, NvSema, NV_DMA_IN_MEMORY,
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&(struct nv_dma_v0) {
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.target = NV_DMA_V0_TARGET_VRAM,
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.access = NV_DMA_V0_ACCESS_RDWR,
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.start = start,
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.limit = limit,
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}, sizeof(struct nv_dma_v0),
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&fctx->sema);
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if (ret)
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nv10_fence_context_del(chan);
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return ret;
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}
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int
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nv50_fence_create(struct nouveau_drm *drm)
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{
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struct nv10_fence_priv *priv;
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int ret = 0;
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priv = drm->fence = kzalloc(sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->base.dtor = nv10_fence_destroy;
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priv->base.resume = nv17_fence_resume;
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priv->base.context_new = nv50_fence_context_new;
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priv->base.context_del = nv10_fence_context_del;
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priv->base.contexts = 127;
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priv->base.context_base = dma_fence_context_alloc(priv->base.contexts);
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spin_lock_init(&priv->lock);
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ret = nouveau_bo_new(&drm->client, 4096, 0x1000, TTM_PL_FLAG_VRAM,
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0, 0x0000, NULL, NULL, &priv->bo);
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if (!ret) {
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ret = nouveau_bo_pin(priv->bo, TTM_PL_FLAG_VRAM, false);
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if (!ret) {
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ret = nouveau_bo_map(priv->bo);
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if (ret)
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nouveau_bo_unpin(priv->bo);
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}
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if (ret)
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nouveau_bo_ref(NULL, &priv->bo);
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}
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if (ret) {
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nv10_fence_destroy(drm);
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return ret;
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}
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nouveau_bo_wr32(priv->bo, 0x000, 0x00000000);
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return ret;
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}
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