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0f731711af
The cavium code assumed that all NOR on the boot bus was an 8-bit NOR part and hardcoded the bankwidth. The simple solution was to add the code that queries the configuration register for the width of the bus that has been hardware strapped to the Cavium. This allows both 8-bit and 16-bit parts to be discovered during boot. Acked-by: David Daney <david.daney@cavium.com> Signed-off-by: Charles Hardin <ckhardin@exablox.com> Patchwork: http://patchwork.linux-mips.org/patch/4323 Signed-off-by: John Crispin <blogic@openwrt.org> |
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| .. | ||
| executive | ||
| .gitignore | ||
| cpu.c | ||
| csrc-octeon.c | ||
| dma-octeon.c | ||
| flash_setup.c | ||
| Kconfig | ||
| Makefile | ||
| octeon_3xxx.dts | ||
| octeon_68xx.dts | ||
| octeon_boot.h | ||
| octeon-irq.c | ||
| octeon-memcpy.S | ||
| octeon-platform.c | ||
| Platform | ||
| serial.c | ||
| setup.c | ||
| smp.c | ||