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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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618b902d8c
h8300_timer8: 8bit clockevent device h8300_timer16 / h8300_tpu: 16bit clocksource Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
208 lines
4.3 KiB
C
208 lines
4.3 KiB
C
/*
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* H8/300 TPU Driver
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*
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* Copyright 2015 Yoshinori Sato <ysato@users.sourcefoge.jp>
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*
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*/
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/clocksource.h>
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#include <linux/module.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <asm/irq.h>
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#define TCR 0
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#define TMDR 1
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#define TIOR 2
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#define TER 4
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#define TSR 5
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#define TCNT 6
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#define TGRA 8
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#define TGRB 10
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#define TGRC 12
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#define TGRD 14
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struct tpu_priv {
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struct platform_device *pdev;
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struct clocksource cs;
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struct clk *clk;
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unsigned long mapbase1;
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unsigned long mapbase2;
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raw_spinlock_t lock;
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unsigned int cs_enabled;
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};
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static inline unsigned long read_tcnt32(struct tpu_priv *p)
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{
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unsigned long tcnt;
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tcnt = ctrl_inw(p->mapbase1 + TCNT) << 16;
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tcnt |= ctrl_inw(p->mapbase2 + TCNT);
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return tcnt;
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}
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static int tpu_get_counter(struct tpu_priv *p, unsigned long long *val)
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{
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unsigned long v1, v2, v3;
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int o1, o2;
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o1 = ctrl_inb(p->mapbase1 + TSR) & 0x10;
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/* Make sure the timer value is stable. Stolen from acpi_pm.c */
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do {
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o2 = o1;
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v1 = read_tcnt32(p);
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v2 = read_tcnt32(p);
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v3 = read_tcnt32(p);
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o1 = ctrl_inb(p->mapbase1 + TSR) & 0x10;
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} while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
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|| (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
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*val = v2;
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return o1;
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}
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static inline struct tpu_priv *cs_to_priv(struct clocksource *cs)
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{
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return container_of(cs, struct tpu_priv, cs);
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}
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static cycle_t tpu_clocksource_read(struct clocksource *cs)
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{
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struct tpu_priv *p = cs_to_priv(cs);
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unsigned long flags;
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unsigned long long value;
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raw_spin_lock_irqsave(&p->lock, flags);
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if (tpu_get_counter(p, &value))
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value += 0x100000000;
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raw_spin_unlock_irqrestore(&p->lock, flags);
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return value;
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}
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static int tpu_clocksource_enable(struct clocksource *cs)
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{
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struct tpu_priv *p = cs_to_priv(cs);
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WARN_ON(p->cs_enabled);
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ctrl_outw(0, p->mapbase1 + TCNT);
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ctrl_outw(0, p->mapbase2 + TCNT);
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ctrl_outb(0x0f, p->mapbase1 + TCR);
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ctrl_outb(0x03, p->mapbase2 + TCR);
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p->cs_enabled = true;
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return 0;
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}
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static void tpu_clocksource_disable(struct clocksource *cs)
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{
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struct tpu_priv *p = cs_to_priv(cs);
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WARN_ON(!p->cs_enabled);
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ctrl_outb(0, p->mapbase1 + TCR);
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ctrl_outb(0, p->mapbase2 + TCR);
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p->cs_enabled = false;
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}
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#define CH_L 0
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#define CH_H 1
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static int __init tpu_setup(struct tpu_priv *p, struct platform_device *pdev)
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{
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struct resource *res[2];
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memset(p, 0, sizeof(*p));
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p->pdev = pdev;
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res[CH_L] = platform_get_resource(p->pdev, IORESOURCE_MEM, CH_L);
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res[CH_H] = platform_get_resource(p->pdev, IORESOURCE_MEM, CH_H);
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if (!res[CH_L] || !res[CH_H]) {
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dev_err(&p->pdev->dev, "failed to get I/O memory\n");
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return -ENXIO;
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}
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p->clk = clk_get(&p->pdev->dev, "fck");
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if (IS_ERR(p->clk)) {
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dev_err(&p->pdev->dev, "can't get clk\n");
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return PTR_ERR(p->clk);
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}
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p->mapbase1 = res[CH_L]->start;
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p->mapbase2 = res[CH_H]->start;
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p->cs.name = pdev->name;
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p->cs.rating = 200;
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p->cs.read = tpu_clocksource_read;
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p->cs.enable = tpu_clocksource_enable;
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p->cs.disable = tpu_clocksource_disable;
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p->cs.mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8);
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p->cs.flags = CLOCK_SOURCE_IS_CONTINUOUS;
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clocksource_register_hz(&p->cs, clk_get_rate(p->clk) / 64);
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platform_set_drvdata(pdev, p);
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return 0;
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}
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static int tpu_probe(struct platform_device *pdev)
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{
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struct tpu_priv *p = platform_get_drvdata(pdev);
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if (p) {
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dev_info(&pdev->dev, "kept as earlytimer\n");
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return 0;
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}
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p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
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if (!p)
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return -ENOMEM;
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return tpu_setup(p, pdev);
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}
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static int tpu_remove(struct platform_device *pdev)
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{
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return -EBUSY;
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}
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static const struct of_device_id tpu_of_table[] = {
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{ .compatible = "renesas,tpu" },
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{ }
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};
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static struct platform_driver tpu_driver = {
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.probe = tpu_probe,
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.remove = tpu_remove,
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.driver = {
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.name = "h8s-tpu",
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.of_match_table = of_match_ptr(tpu_of_table),
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}
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};
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static int __init tpu_init(void)
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{
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return platform_driver_register(&tpu_driver);
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}
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static void __exit tpu_exit(void)
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{
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platform_driver_unregister(&tpu_driver);
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}
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subsys_initcall(tpu_init);
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module_exit(tpu_exit);
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MODULE_AUTHOR("Yoshinori Sato");
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MODULE_DESCRIPTION("H8S Timer Pulse Unit Driver");
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MODULE_LICENSE("GPL v2");
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