mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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3601fe43e8
Core changes: - The big change this time around is the irqchip handling in the qualcomm pin controllers, closely coupled with the gpiochip. This rework, in a classic fall-between-the-chairs fashion has been sidestepped for too long. The Qualcomm IRQchips using the SPMI and SSBI transport mechanisms have been rewritten to use hierarchical irqchip. This creates the base from which I intend to gradually pull support for hierarchical irqchips into the gpiolib irqchip helpers to cut down on duplicate code. We have too many hacks in the kernel because people have been working around the missing hierarchical irqchip for years, and once it was there, noone understood it for a while. We are now slowly adapting to using it. This is why this pull requests include changes to MFD, SPMI, IRQchip core and some ARM Device Trees pertaining to the Qualcomm chip family. Since Qualcomm have so many chips and such large deployments it is paramount that this platform gets this right, and now it (hopefully) does. - Core support for pull-up and pull-down configuration, also from the device tree. When a simple GPIO chip support a "off or on" pull-up or pull-down resistor, we provide a way to set this up using machine descriptors or device tree. If more elaborate control of pull up/down (such as resistance shunt setting) is required, drivers should be phased over to use pin control. We do not yet provide a userspace ABI for this pull up-down setting but I suspect the makers are going to ask for it soon enough. PCA953x is the first user of this new API. - The GPIO mockup driver has been revamped after some discussion improving the IRQ simulator in the process. The idea is to make it possible to use the mockup for both testing and virtual prototyping, e.g. when you do not yet have a GPIO expander to play with but really want to get something to develop code around before hardware is available. It's neat. The blackbox testing usecase is currently making its way into kernelci. - ACPI GPIO core preserves non direction flags when updating flags. - A new device core helper for devm_platform_ioremap_resource() is funneled through the GPIO tree with Greg's ACK. New drivers: - TQ-Systems QTMX86 GPIO controllers (using port-mapped I/O) - Gateworks PLD GPIO driver (vaccumed up from OpenWrt) - AMD G-Series PCH (Platform Controller Hub) GPIO driver. - Fintek F81804 & F81966 subvariants. - PCA953x now supports NXP PCAL6416. Driver improvements: - IRQ support on the Nintendo Wii (Hollywood) GPIO. - get_direction() support for the MVEBU driver. - Set the right output level on SAMA5D2. - Drop the unused irq trigger setting on the Spreadtrum driver. - Wakeup support for PCA953x. - A slew of cleanups in the various Intel drivers. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJcgoLEAAoJEEEQszewGV1zjBAP/3OmTFGv49PFmJwSx+PlLiYf V6/UPaQzq81CGSMtHxbS51TyP9Id7PCfsacbuFYutzn0D1efvl7jrkb8qJ6fVvCM bl/i6q8ipRTPzAf1hD3QCgCe3BXCA064/OcPrz987oIvI3bJQXsmBjBSXHWr4Cwa WfB5DX/afn9TK3XHhMQGfw5f0d+TtnKAs90RTTVKiz9Ow8eFYZJOhgPkvhCR3Gi9 YJIzIAiwhHZ7/zauo4JAYFU/O/Z3YEC5zeLne2ItebzNooRkSxdz0c9Hs7HlCZmU 930Uv9jNN89N3vPqpZzAHtPvwDOmAILMWvKy9xRSp+eoIukarRJgF7ALPk7QWxK1 yy+tGj4dXBQ6tI8W3wUN1WgjNpii3K1HbJ+1LQVQL2/q9o+3YXXqmjdjuw7C8YYV 5ystNrUppkgfIIciHL4lhqw3wKJJhVEAns2V245hIitoShT+RvIg8GQbGZmWlQFd YsHbynqHL9iwfRNv26kEqZXZOo/4D1t6Scw+OPVyba2Wyttf+qbmg+XaYMqFaxYW mfydvdtymeCOUIPJMzw58KGPUTXJ4UPLENyayXNUHokr1a8VO8OIthY7zwi0CpvJ IcsAY9zoGxvfbRV922mlIsw3oOBcM2IN2lC9sY469ZVnjBrdC3rsQpIBZr+Vzz8i YlUfXLSGSyuUZUz//2eG =VoVC -----END PGP SIGNATURE----- Merge tag 'gpio-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO updates from Linus Walleij: "This is the bulk of GPIO changes for the v5.1 cycle: Core changes: - The big change this time around is the irqchip handling in the qualcomm pin controllers, closely coupled with the gpiochip. This rework, in a classic fall-between-the-chairs fashion has been sidestepped for too long. The Qualcomm IRQchips using the SPMI and SSBI transport mechanisms have been rewritten to use hierarchical irqchip. This creates the base from which I intend to gradually pull support for hierarchical irqchips into the gpiolib irqchip helpers to cut down on duplicate code. We have too many hacks in the kernel because people have been working around the missing hierarchical irqchip for years, and once it was there, noone understood it for a while. We are now slowly adapting to using it. This is why this pull requests include changes to MFD, SPMI, IRQchip core and some ARM Device Trees pertaining to the Qualcomm chip family. Since Qualcomm have so many chips and such large deployments it is paramount that this platform gets this right, and now it (hopefully) does. - Core support for pull-up and pull-down configuration, also from the device tree. When a simple GPIO chip supports an "off or on" pull-up or pull-down resistor, we provide a way to set this up using machine descriptors or device tree. If more elaborate control of pull up/down (such as resistance shunt setting) is required, drivers should be phased over to use pin control. We do not yet provide a userspace ABI for this pull up-down setting but I suspect the makers are going to ask for it soon enough. PCA953x is the first user of this new API. - The GPIO mockup driver has been revamped after some discussion improving the IRQ simulator in the process. The idea is to make it possible to use the mockup for both testing and virtual prototyping, e.g. when you do not yet have a GPIO expander to play with but really want to get something to develop code around before hardware is available. It's neat. The blackbox testing usecase is currently making its way into kernelci. - ACPI GPIO core preserves non direction flags when updating flags. - A new device core helper for devm_platform_ioremap_resource() is funneled through the GPIO tree with Greg's ACK. New drivers: - TQ-Systems QTMX86 GPIO controllers (using port-mapped I/O) - Gateworks PLD GPIO driver (vaccumed up from OpenWrt) - AMD G-Series PCH (Platform Controller Hub) GPIO driver. - Fintek F81804 & F81966 subvariants. - PCA953x now supports NXP PCAL6416. Driver improvements: - IRQ support on the Nintendo Wii (Hollywood) GPIO. - get_direction() support for the MVEBU driver. - Set the right output level on SAMA5D2. - Drop the unused irq trigger setting on the Spreadtrum driver. - Wakeup support for PCA953x. - A slew of cleanups in the various Intel drivers" * tag 'gpio-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (110 commits) gpio: gpio-omap: fix level interrupt idling gpio: amd-fch: Set proper output level for direction_output x86: apuv2: remove unused variable gpio: pca953x: Use PCA_LATCH_INT platform/x86: fix PCENGINES_APU2 Kconfig warning gpio: pca953x: Fix dereference of irq data in shutdown gpio: amd-fch: Fix type error found by sparse gpio: amd-fch: Drop const from resource gpio: mxc: add check to return defer probe if clock tree NOT ready gpio: ftgpio: Register per-instance irqchip gpio: ixp4xx: Add DT bindings x86: pcengines apuv2 gpio/leds/keys platform driver gpio: AMD G-Series PCH gpio driver drivers: depend on HAS_IOMEM for devm_platform_ioremap_resource() gpio: tqmx86: Set proper output level for direction_output gpio: sprd: Change to use SoC compatible string gpio: sprd: Use SoC compatible string instead of wildcard string gpio: of: Handle both enable-gpio{,s} gpio: of: Restrict enable-gpio quirk to regulator-gpio gpio: davinci: use devm_platform_ioremap_resource() ...
592 lines
19 KiB
C
592 lines
19 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* irq_domain - IRQ translation domains
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*
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* Translation infrastructure between hw and linux irq numbers. This is
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* helpful for interrupt controllers to implement mapping between hardware
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* irq numbers and the Linux irq number space.
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*
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* irq_domains also have hooks for translating device tree or other
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* firmware interrupt representations into a hardware irq number that
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* can be mapped back to a Linux irq number without any extra platform
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* support code.
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*
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* Interrupt controller "domain" data structure. This could be defined as a
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* irq domain controller. That is, it handles the mapping between hardware
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* and virtual interrupt numbers for a given interrupt domain. The domain
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* structure is generally created by the PIC code for a given PIC instance
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* (though a domain can cover more than one PIC if they have a flat number
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* model). It's the domain callbacks that are responsible for setting the
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* irq_chip on a given irq_desc after it's been mapped.
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*
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* The host code and data structures use a fwnode_handle pointer to
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* identify the domain. In some cases, and in order to preserve source
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* code compatibility, this fwnode pointer is "upgraded" to a DT
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* device_node. For those firmware infrastructures that do not provide
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* a unique identifier for an interrupt controller, the irq_domain
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* code offers a fwnode allocator.
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*/
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#ifndef _LINUX_IRQDOMAIN_H
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#define _LINUX_IRQDOMAIN_H
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#include <linux/types.h>
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#include <linux/irqhandler.h>
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#include <linux/of.h>
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#include <linux/mutex.h>
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#include <linux/radix-tree.h>
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struct device_node;
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struct irq_domain;
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struct of_device_id;
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struct irq_chip;
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struct irq_data;
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struct cpumask;
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struct seq_file;
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struct irq_affinity_desc;
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/* Number of irqs reserved for a legacy isa controller */
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#define NUM_ISA_INTERRUPTS 16
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#define IRQ_DOMAIN_IRQ_SPEC_PARAMS 16
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/**
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* struct irq_fwspec - generic IRQ specifier structure
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*
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* @fwnode: Pointer to a firmware-specific descriptor
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* @param_count: Number of device-specific parameters
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* @param: Device-specific parameters
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*
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* This structure, directly modeled after of_phandle_args, is used to
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* pass a device-specific description of an interrupt.
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*/
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struct irq_fwspec {
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struct fwnode_handle *fwnode;
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int param_count;
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u32 param[IRQ_DOMAIN_IRQ_SPEC_PARAMS];
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};
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/*
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* Should several domains have the same device node, but serve
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* different purposes (for example one domain is for PCI/MSI, and the
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* other for wired IRQs), they can be distinguished using a
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* bus-specific token. Most domains are expected to only carry
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* DOMAIN_BUS_ANY.
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*/
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enum irq_domain_bus_token {
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DOMAIN_BUS_ANY = 0,
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DOMAIN_BUS_WIRED,
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DOMAIN_BUS_GENERIC_MSI,
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DOMAIN_BUS_PCI_MSI,
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DOMAIN_BUS_PLATFORM_MSI,
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DOMAIN_BUS_NEXUS,
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DOMAIN_BUS_IPI,
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DOMAIN_BUS_FSL_MC_MSI,
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};
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/**
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* struct irq_domain_ops - Methods for irq_domain objects
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* @match: Match an interrupt controller device node to a host, returns
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* 1 on a match
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* @map: Create or update a mapping between a virtual irq number and a hw
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* irq number. This is called only once for a given mapping.
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* @unmap: Dispose of such a mapping
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* @xlate: Given a device tree node and interrupt specifier, decode
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* the hardware irq number and linux irq type value.
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*
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* Functions below are provided by the driver and called whenever a new mapping
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* is created or an old mapping is disposed. The driver can then proceed to
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* whatever internal data structures management is required. It also needs
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* to setup the irq_desc when returning from map().
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*/
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struct irq_domain_ops {
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int (*match)(struct irq_domain *d, struct device_node *node,
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enum irq_domain_bus_token bus_token);
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int (*select)(struct irq_domain *d, struct irq_fwspec *fwspec,
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enum irq_domain_bus_token bus_token);
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int (*map)(struct irq_domain *d, unsigned int virq, irq_hw_number_t hw);
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void (*unmap)(struct irq_domain *d, unsigned int virq);
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int (*xlate)(struct irq_domain *d, struct device_node *node,
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const u32 *intspec, unsigned int intsize,
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unsigned long *out_hwirq, unsigned int *out_type);
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#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
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/* extended V2 interfaces to support hierarchy irq_domains */
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int (*alloc)(struct irq_domain *d, unsigned int virq,
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unsigned int nr_irqs, void *arg);
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void (*free)(struct irq_domain *d, unsigned int virq,
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unsigned int nr_irqs);
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int (*activate)(struct irq_domain *d, struct irq_data *irqd, bool reserve);
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void (*deactivate)(struct irq_domain *d, struct irq_data *irq_data);
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int (*translate)(struct irq_domain *d, struct irq_fwspec *fwspec,
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unsigned long *out_hwirq, unsigned int *out_type);
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#endif
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#ifdef CONFIG_GENERIC_IRQ_DEBUGFS
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void (*debug_show)(struct seq_file *m, struct irq_domain *d,
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struct irq_data *irqd, int ind);
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#endif
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};
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extern struct irq_domain_ops irq_generic_chip_ops;
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struct irq_domain_chip_generic;
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/**
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* struct irq_domain - Hardware interrupt number translation object
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* @link: Element in global irq_domain list.
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* @name: Name of interrupt domain
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* @ops: pointer to irq_domain methods
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* @host_data: private data pointer for use by owner. Not touched by irq_domain
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* core code.
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* @flags: host per irq_domain flags
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* @mapcount: The number of mapped interrupts
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*
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* Optional elements
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* @fwnode: Pointer to firmware node associated with the irq_domain. Pretty easy
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* to swap it for the of_node via the irq_domain_get_of_node accessor
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* @gc: Pointer to a list of generic chips. There is a helper function for
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* setting up one or more generic chips for interrupt controllers
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* drivers using the generic chip library which uses this pointer.
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* @parent: Pointer to parent irq_domain to support hierarchy irq_domains
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* @debugfs_file: dentry for the domain debugfs file
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*
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* Revmap data, used internally by irq_domain
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* @revmap_direct_max_irq: The largest hwirq that can be set for controllers that
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* support direct mapping
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* @revmap_size: Size of the linear map table @linear_revmap[]
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* @revmap_tree: Radix map tree for hwirqs that don't fit in the linear map
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* @linear_revmap: Linear table of hwirq->virq reverse mappings
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*/
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struct irq_domain {
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struct list_head link;
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const char *name;
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const struct irq_domain_ops *ops;
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void *host_data;
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unsigned int flags;
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unsigned int mapcount;
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/* Optional data */
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struct fwnode_handle *fwnode;
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enum irq_domain_bus_token bus_token;
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struct irq_domain_chip_generic *gc;
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#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
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struct irq_domain *parent;
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#endif
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#ifdef CONFIG_GENERIC_IRQ_DEBUGFS
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struct dentry *debugfs_file;
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#endif
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/* reverse map data. The linear map gets appended to the irq_domain */
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irq_hw_number_t hwirq_max;
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unsigned int revmap_direct_max_irq;
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unsigned int revmap_size;
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struct radix_tree_root revmap_tree;
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struct mutex revmap_tree_mutex;
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unsigned int linear_revmap[];
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};
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/* Irq domain flags */
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enum {
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/* Irq domain is hierarchical */
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IRQ_DOMAIN_FLAG_HIERARCHY = (1 << 0),
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/* Irq domain name was allocated in __irq_domain_add() */
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IRQ_DOMAIN_NAME_ALLOCATED = (1 << 6),
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/* Irq domain is an IPI domain with virq per cpu */
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IRQ_DOMAIN_FLAG_IPI_PER_CPU = (1 << 2),
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/* Irq domain is an IPI domain with single virq */
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IRQ_DOMAIN_FLAG_IPI_SINGLE = (1 << 3),
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/* Irq domain implements MSIs */
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IRQ_DOMAIN_FLAG_MSI = (1 << 4),
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/* Irq domain implements MSI remapping */
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IRQ_DOMAIN_FLAG_MSI_REMAP = (1 << 5),
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/*
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* Flags starting from IRQ_DOMAIN_FLAG_NONCORE are reserved
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* for implementation specific purposes and ignored by the
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* core code.
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*/
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IRQ_DOMAIN_FLAG_NONCORE = (1 << 16),
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};
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static inline struct device_node *irq_domain_get_of_node(struct irq_domain *d)
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{
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return to_of_node(d->fwnode);
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}
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#ifdef CONFIG_IRQ_DOMAIN
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struct fwnode_handle *__irq_domain_alloc_fwnode(unsigned int type, int id,
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const char *name, void *data);
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enum {
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IRQCHIP_FWNODE_REAL,
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IRQCHIP_FWNODE_NAMED,
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IRQCHIP_FWNODE_NAMED_ID,
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};
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static inline
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struct fwnode_handle *irq_domain_alloc_named_fwnode(const char *name)
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{
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return __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_NAMED, 0, name, NULL);
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}
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static inline
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struct fwnode_handle *irq_domain_alloc_named_id_fwnode(const char *name, int id)
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{
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return __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_NAMED_ID, id, name,
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NULL);
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}
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static inline struct fwnode_handle *irq_domain_alloc_fwnode(void *data)
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{
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return __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_REAL, 0, NULL, data);
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}
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void irq_domain_free_fwnode(struct fwnode_handle *fwnode);
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struct irq_domain *__irq_domain_add(struct fwnode_handle *fwnode, int size,
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irq_hw_number_t hwirq_max, int direct_max,
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const struct irq_domain_ops *ops,
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void *host_data);
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struct irq_domain *irq_domain_add_simple(struct device_node *of_node,
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unsigned int size,
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unsigned int first_irq,
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const struct irq_domain_ops *ops,
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void *host_data);
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struct irq_domain *irq_domain_add_legacy(struct device_node *of_node,
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unsigned int size,
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unsigned int first_irq,
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irq_hw_number_t first_hwirq,
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const struct irq_domain_ops *ops,
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void *host_data);
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extern struct irq_domain *irq_find_matching_fwspec(struct irq_fwspec *fwspec,
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enum irq_domain_bus_token bus_token);
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extern bool irq_domain_check_msi_remap(void);
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extern void irq_set_default_host(struct irq_domain *host);
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extern struct irq_domain *irq_get_default_host(void);
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extern int irq_domain_alloc_descs(int virq, unsigned int nr_irqs,
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irq_hw_number_t hwirq, int node,
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const struct irq_affinity_desc *affinity);
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static inline struct fwnode_handle *of_node_to_fwnode(struct device_node *node)
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{
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return node ? &node->fwnode : NULL;
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}
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extern const struct fwnode_operations irqchip_fwnode_ops;
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static inline bool is_fwnode_irqchip(struct fwnode_handle *fwnode)
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{
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return fwnode && fwnode->ops == &irqchip_fwnode_ops;
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}
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extern void irq_domain_update_bus_token(struct irq_domain *domain,
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enum irq_domain_bus_token bus_token);
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static inline
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struct irq_domain *irq_find_matching_fwnode(struct fwnode_handle *fwnode,
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enum irq_domain_bus_token bus_token)
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{
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struct irq_fwspec fwspec = {
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.fwnode = fwnode,
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};
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return irq_find_matching_fwspec(&fwspec, bus_token);
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}
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static inline struct irq_domain *irq_find_matching_host(struct device_node *node,
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enum irq_domain_bus_token bus_token)
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{
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return irq_find_matching_fwnode(of_node_to_fwnode(node), bus_token);
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}
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static inline struct irq_domain *irq_find_host(struct device_node *node)
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{
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struct irq_domain *d;
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d = irq_find_matching_host(node, DOMAIN_BUS_WIRED);
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if (!d)
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d = irq_find_matching_host(node, DOMAIN_BUS_ANY);
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return d;
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}
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/**
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* irq_domain_add_linear() - Allocate and register a linear revmap irq_domain.
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* @of_node: pointer to interrupt controller's device tree node.
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* @size: Number of interrupts in the domain.
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* @ops: map/unmap domain callbacks
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* @host_data: Controller private data pointer
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*/
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static inline struct irq_domain *irq_domain_add_linear(struct device_node *of_node,
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unsigned int size,
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const struct irq_domain_ops *ops,
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void *host_data)
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{
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return __irq_domain_add(of_node_to_fwnode(of_node), size, size, 0, ops, host_data);
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}
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static inline struct irq_domain *irq_domain_add_nomap(struct device_node *of_node,
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unsigned int max_irq,
|
|
const struct irq_domain_ops *ops,
|
|
void *host_data)
|
|
{
|
|
return __irq_domain_add(of_node_to_fwnode(of_node), 0, max_irq, max_irq, ops, host_data);
|
|
}
|
|
static inline struct irq_domain *irq_domain_add_legacy_isa(
|
|
struct device_node *of_node,
|
|
const struct irq_domain_ops *ops,
|
|
void *host_data)
|
|
{
|
|
return irq_domain_add_legacy(of_node, NUM_ISA_INTERRUPTS, 0, 0, ops,
|
|
host_data);
|
|
}
|
|
static inline struct irq_domain *irq_domain_add_tree(struct device_node *of_node,
|
|
const struct irq_domain_ops *ops,
|
|
void *host_data)
|
|
{
|
|
return __irq_domain_add(of_node_to_fwnode(of_node), 0, ~0, 0, ops, host_data);
|
|
}
|
|
|
|
static inline struct irq_domain *irq_domain_create_linear(struct fwnode_handle *fwnode,
|
|
unsigned int size,
|
|
const struct irq_domain_ops *ops,
|
|
void *host_data)
|
|
{
|
|
return __irq_domain_add(fwnode, size, size, 0, ops, host_data);
|
|
}
|
|
|
|
static inline struct irq_domain *irq_domain_create_tree(struct fwnode_handle *fwnode,
|
|
const struct irq_domain_ops *ops,
|
|
void *host_data)
|
|
{
|
|
return __irq_domain_add(fwnode, 0, ~0, 0, ops, host_data);
|
|
}
|
|
|
|
extern void irq_domain_remove(struct irq_domain *host);
|
|
|
|
extern int irq_domain_associate(struct irq_domain *domain, unsigned int irq,
|
|
irq_hw_number_t hwirq);
|
|
extern void irq_domain_associate_many(struct irq_domain *domain,
|
|
unsigned int irq_base,
|
|
irq_hw_number_t hwirq_base, int count);
|
|
extern void irq_domain_disassociate(struct irq_domain *domain,
|
|
unsigned int irq);
|
|
|
|
extern unsigned int irq_create_mapping(struct irq_domain *host,
|
|
irq_hw_number_t hwirq);
|
|
extern unsigned int irq_create_fwspec_mapping(struct irq_fwspec *fwspec);
|
|
extern void irq_dispose_mapping(unsigned int virq);
|
|
|
|
/**
|
|
* irq_linear_revmap() - Find a linux irq from a hw irq number.
|
|
* @domain: domain owning this hardware interrupt
|
|
* @hwirq: hardware irq number in that domain space
|
|
*
|
|
* This is a fast path alternative to irq_find_mapping() that can be
|
|
* called directly by irq controller code to save a handful of
|
|
* instructions. It is always safe to call, but won't find irqs mapped
|
|
* using the radix tree.
|
|
*/
|
|
static inline unsigned int irq_linear_revmap(struct irq_domain *domain,
|
|
irq_hw_number_t hwirq)
|
|
{
|
|
return hwirq < domain->revmap_size ? domain->linear_revmap[hwirq] : 0;
|
|
}
|
|
extern unsigned int irq_find_mapping(struct irq_domain *host,
|
|
irq_hw_number_t hwirq);
|
|
extern unsigned int irq_create_direct_mapping(struct irq_domain *host);
|
|
extern int irq_create_strict_mappings(struct irq_domain *domain,
|
|
unsigned int irq_base,
|
|
irq_hw_number_t hwirq_base, int count);
|
|
|
|
static inline int irq_create_identity_mapping(struct irq_domain *host,
|
|
irq_hw_number_t hwirq)
|
|
{
|
|
return irq_create_strict_mappings(host, hwirq, hwirq, 1);
|
|
}
|
|
|
|
extern const struct irq_domain_ops irq_domain_simple_ops;
|
|
|
|
/* stock xlate functions */
|
|
int irq_domain_xlate_onecell(struct irq_domain *d, struct device_node *ctrlr,
|
|
const u32 *intspec, unsigned int intsize,
|
|
irq_hw_number_t *out_hwirq, unsigned int *out_type);
|
|
int irq_domain_xlate_twocell(struct irq_domain *d, struct device_node *ctrlr,
|
|
const u32 *intspec, unsigned int intsize,
|
|
irq_hw_number_t *out_hwirq, unsigned int *out_type);
|
|
int irq_domain_xlate_onetwocell(struct irq_domain *d, struct device_node *ctrlr,
|
|
const u32 *intspec, unsigned int intsize,
|
|
irq_hw_number_t *out_hwirq, unsigned int *out_type);
|
|
|
|
int irq_domain_translate_twocell(struct irq_domain *d,
|
|
struct irq_fwspec *fwspec,
|
|
unsigned long *out_hwirq,
|
|
unsigned int *out_type);
|
|
|
|
/* IPI functions */
|
|
int irq_reserve_ipi(struct irq_domain *domain, const struct cpumask *dest);
|
|
int irq_destroy_ipi(unsigned int irq, const struct cpumask *dest);
|
|
|
|
/* V2 interfaces to support hierarchy IRQ domains. */
|
|
extern struct irq_data *irq_domain_get_irq_data(struct irq_domain *domain,
|
|
unsigned int virq);
|
|
extern void irq_domain_set_info(struct irq_domain *domain, unsigned int virq,
|
|
irq_hw_number_t hwirq, struct irq_chip *chip,
|
|
void *chip_data, irq_flow_handler_t handler,
|
|
void *handler_data, const char *handler_name);
|
|
#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
|
|
extern struct irq_domain *irq_domain_create_hierarchy(struct irq_domain *parent,
|
|
unsigned int flags, unsigned int size,
|
|
struct fwnode_handle *fwnode,
|
|
const struct irq_domain_ops *ops, void *host_data);
|
|
|
|
static inline struct irq_domain *irq_domain_add_hierarchy(struct irq_domain *parent,
|
|
unsigned int flags,
|
|
unsigned int size,
|
|
struct device_node *node,
|
|
const struct irq_domain_ops *ops,
|
|
void *host_data)
|
|
{
|
|
return irq_domain_create_hierarchy(parent, flags, size,
|
|
of_node_to_fwnode(node),
|
|
ops, host_data);
|
|
}
|
|
|
|
extern int __irq_domain_alloc_irqs(struct irq_domain *domain, int irq_base,
|
|
unsigned int nr_irqs, int node, void *arg,
|
|
bool realloc,
|
|
const struct irq_affinity_desc *affinity);
|
|
extern void irq_domain_free_irqs(unsigned int virq, unsigned int nr_irqs);
|
|
extern int irq_domain_activate_irq(struct irq_data *irq_data, bool early);
|
|
extern void irq_domain_deactivate_irq(struct irq_data *irq_data);
|
|
|
|
static inline int irq_domain_alloc_irqs(struct irq_domain *domain,
|
|
unsigned int nr_irqs, int node, void *arg)
|
|
{
|
|
return __irq_domain_alloc_irqs(domain, -1, nr_irqs, node, arg, false,
|
|
NULL);
|
|
}
|
|
|
|
extern int irq_domain_alloc_irqs_hierarchy(struct irq_domain *domain,
|
|
unsigned int irq_base,
|
|
unsigned int nr_irqs, void *arg);
|
|
extern int irq_domain_set_hwirq_and_chip(struct irq_domain *domain,
|
|
unsigned int virq,
|
|
irq_hw_number_t hwirq,
|
|
struct irq_chip *chip,
|
|
void *chip_data);
|
|
extern void irq_domain_reset_irq_data(struct irq_data *irq_data);
|
|
extern void irq_domain_free_irqs_common(struct irq_domain *domain,
|
|
unsigned int virq,
|
|
unsigned int nr_irqs);
|
|
extern void irq_domain_free_irqs_top(struct irq_domain *domain,
|
|
unsigned int virq, unsigned int nr_irqs);
|
|
|
|
extern int irq_domain_push_irq(struct irq_domain *domain, int virq, void *arg);
|
|
extern int irq_domain_pop_irq(struct irq_domain *domain, int virq);
|
|
|
|
extern int irq_domain_alloc_irqs_parent(struct irq_domain *domain,
|
|
unsigned int irq_base,
|
|
unsigned int nr_irqs, void *arg);
|
|
|
|
extern void irq_domain_free_irqs_parent(struct irq_domain *domain,
|
|
unsigned int irq_base,
|
|
unsigned int nr_irqs);
|
|
|
|
static inline bool irq_domain_is_hierarchy(struct irq_domain *domain)
|
|
{
|
|
return domain->flags & IRQ_DOMAIN_FLAG_HIERARCHY;
|
|
}
|
|
|
|
static inline bool irq_domain_is_ipi(struct irq_domain *domain)
|
|
{
|
|
return domain->flags &
|
|
(IRQ_DOMAIN_FLAG_IPI_PER_CPU | IRQ_DOMAIN_FLAG_IPI_SINGLE);
|
|
}
|
|
|
|
static inline bool irq_domain_is_ipi_per_cpu(struct irq_domain *domain)
|
|
{
|
|
return domain->flags & IRQ_DOMAIN_FLAG_IPI_PER_CPU;
|
|
}
|
|
|
|
static inline bool irq_domain_is_ipi_single(struct irq_domain *domain)
|
|
{
|
|
return domain->flags & IRQ_DOMAIN_FLAG_IPI_SINGLE;
|
|
}
|
|
|
|
static inline bool irq_domain_is_msi(struct irq_domain *domain)
|
|
{
|
|
return domain->flags & IRQ_DOMAIN_FLAG_MSI;
|
|
}
|
|
|
|
static inline bool irq_domain_is_msi_remap(struct irq_domain *domain)
|
|
{
|
|
return domain->flags & IRQ_DOMAIN_FLAG_MSI_REMAP;
|
|
}
|
|
|
|
extern bool irq_domain_hierarchical_is_msi_remap(struct irq_domain *domain);
|
|
|
|
#else /* CONFIG_IRQ_DOMAIN_HIERARCHY */
|
|
static inline int irq_domain_alloc_irqs(struct irq_domain *domain,
|
|
unsigned int nr_irqs, int node, void *arg)
|
|
{
|
|
return -1;
|
|
}
|
|
|
|
static inline void irq_domain_free_irqs(unsigned int virq,
|
|
unsigned int nr_irqs) { }
|
|
|
|
static inline bool irq_domain_is_hierarchy(struct irq_domain *domain)
|
|
{
|
|
return false;
|
|
}
|
|
|
|
static inline bool irq_domain_is_ipi(struct irq_domain *domain)
|
|
{
|
|
return false;
|
|
}
|
|
|
|
static inline bool irq_domain_is_ipi_per_cpu(struct irq_domain *domain)
|
|
{
|
|
return false;
|
|
}
|
|
|
|
static inline bool irq_domain_is_ipi_single(struct irq_domain *domain)
|
|
{
|
|
return false;
|
|
}
|
|
|
|
static inline bool irq_domain_is_msi(struct irq_domain *domain)
|
|
{
|
|
return false;
|
|
}
|
|
|
|
static inline bool irq_domain_is_msi_remap(struct irq_domain *domain)
|
|
{
|
|
return false;
|
|
}
|
|
|
|
static inline bool
|
|
irq_domain_hierarchical_is_msi_remap(struct irq_domain *domain)
|
|
{
|
|
return false;
|
|
}
|
|
#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
|
|
|
|
#else /* CONFIG_IRQ_DOMAIN */
|
|
static inline void irq_dispose_mapping(unsigned int virq) { }
|
|
static inline struct irq_domain *irq_find_matching_fwnode(
|
|
struct fwnode_handle *fwnode, enum irq_domain_bus_token bus_token)
|
|
{
|
|
return NULL;
|
|
}
|
|
static inline bool irq_domain_check_msi_remap(void)
|
|
{
|
|
return false;
|
|
}
|
|
#endif /* !CONFIG_IRQ_DOMAIN */
|
|
|
|
#endif /* _LINUX_IRQDOMAIN_H */
|