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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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dfd437a257
- arm64 support for syscall emulation via PTRACE_SYSEMU{,_SINGLESTEP} - Wire up VM_FLUSH_RESET_PERMS for arm64, allowing the core code to manage the permissions of executable vmalloc regions more strictly - Slight performance improvement by keeping softirqs enabled while touching the FPSIMD/SVE state (kernel_neon_begin/end) - Expose a couple of ARMv8.5 features to user (HWCAP): CondM (new XAFLAG and AXFLAG instructions for floating point comparison flags manipulation) and FRINT (rounding floating point numbers to integers) - Re-instate ARM64_PSEUDO_NMI support which was previously marked as BROKEN due to some bugs (now fixed) - Improve parking of stopped CPUs and implement an arm64-specific panic_smp_self_stop() to avoid warning on not being able to stop secondary CPUs during panic - perf: enable the ARM Statistical Profiling Extensions (SPE) on ACPI platforms - perf: DDR performance monitor support for iMX8QXP - cache_line_size() can now be set from DT or ACPI/PPTT if provided to cope with a system cache info not exposed via the CPUID registers - Avoid warning on hardware cache line size greater than ARCH_DMA_MINALIGN if the system is fully coherent - arm64 do_page_fault() and hugetlb cleanups - Refactor set_pte_at() to avoid redundant READ_ONCE(*ptep) - Ignore ACPI 5.1 FADTs reported as 5.0 (infer from the 'arm_boot_flags' introduced in 5.1) - CONFIG_RANDOMIZE_BASE now enabled in defconfig - Allow the selection of ARM64_MODULE_PLTS, currently only done via RANDOMIZE_BASE (and an erratum workaround), allowing modules to spill over into the vmalloc area - Make ZONE_DMA32 configurable -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAl0eHqcACgkQa9axLQDI XvFyNA/+L+bnkz8m3ncydlqqfXomQn4eJJVQ8Uksb0knJz+1+3CUxxbO4ry4jXZN fMkbggYrDPRKpDbsUl0lsRipj7jW9bqan+N37c3SWqCkgb6HqDaHViwxdx6Ec/Uk gHudozDSPh/8c7hxGcSyt/CFyuW6b+8eYIQU5rtIgz8aVY2BypBvS/7YtYCbIkx0 w4CFleRTK1zXD5mJQhrc6jyDx659sVkrAvdhf6YIymOY8nBTv40vwdNo3beJMYp8 Po/+0Ixu+VkHUNtmYYZQgP/AGH96xiTcRnUqd172JdtRPpCLqnLqwFokXeVIlUKT KZFMDPzK+756Ayn4z4huEePPAOGlHbJje8JVNnFyreKhVVcCotW7YPY/oJR10bnc eo7yD+DxABTn+93G2yP436bNVa8qO1UqjOBfInWBtnNFJfANIkZweij/MQ6MjaTA o7KtviHnZFClefMPoiI7HDzwL8XSmsBDbeQ04s2Wxku1Y2xUHLx4iLmadwLQ1ZPb lZMTZP3N/T1554MoURVA1afCjAwiqU3bt1xDUGjbBVjLfSPBAn/25IacsG9Li9AF 7Rp1M9VhrfLftjFFkB2HwpbhRASOxaOSx+EI3kzEfCtM2O9I1WHgP3rvCdc3l0HU tbK0/IggQicNgz7GSZ8xDlWPwwSadXYGLys+xlMZEYd3pDIOiFc= =0TDT -----END PGP SIGNATURE----- Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Catalin Marinas: - arm64 support for syscall emulation via PTRACE_SYSEMU{,_SINGLESTEP} - Wire up VM_FLUSH_RESET_PERMS for arm64, allowing the core code to manage the permissions of executable vmalloc regions more strictly - Slight performance improvement by keeping softirqs enabled while touching the FPSIMD/SVE state (kernel_neon_begin/end) - Expose a couple of ARMv8.5 features to user (HWCAP): CondM (new XAFLAG and AXFLAG instructions for floating point comparison flags manipulation) and FRINT (rounding floating point numbers to integers) - Re-instate ARM64_PSEUDO_NMI support which was previously marked as BROKEN due to some bugs (now fixed) - Improve parking of stopped CPUs and implement an arm64-specific panic_smp_self_stop() to avoid warning on not being able to stop secondary CPUs during panic - perf: enable the ARM Statistical Profiling Extensions (SPE) on ACPI platforms - perf: DDR performance monitor support for iMX8QXP - cache_line_size() can now be set from DT or ACPI/PPTT if provided to cope with a system cache info not exposed via the CPUID registers - Avoid warning on hardware cache line size greater than ARCH_DMA_MINALIGN if the system is fully coherent - arm64 do_page_fault() and hugetlb cleanups - Refactor set_pte_at() to avoid redundant READ_ONCE(*ptep) - Ignore ACPI 5.1 FADTs reported as 5.0 (infer from the 'arm_boot_flags' introduced in 5.1) - CONFIG_RANDOMIZE_BASE now enabled in defconfig - Allow the selection of ARM64_MODULE_PLTS, currently only done via RANDOMIZE_BASE (and an erratum workaround), allowing modules to spill over into the vmalloc area - Make ZONE_DMA32 configurable * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (54 commits) perf: arm_spe: Enable ACPI/Platform automatic module loading arm_pmu: acpi: spe: Add initial MADT/SPE probing ACPI/PPTT: Add function to return ACPI 6.3 Identical tokens ACPI/PPTT: Modify node flag detection to find last IDENTICAL x86/entry: Simplify _TIF_SYSCALL_EMU handling arm64: rename dump_instr as dump_kernel_instr arm64/mm: Drop [PTE|PMD]_TYPE_FAULT arm64: Implement panic_smp_self_stop() arm64: Improve parking of stopped CPUs arm64: Expose FRINT capabilities to userspace arm64: Expose ARMv8.5 CondM capability to userspace arm64: defconfig: enable CONFIG_RANDOMIZE_BASE arm64: ARM64_MODULES_PLTS must depend on MODULES arm64: bpf: do not allocate executable memory arm64/kprobes: set VM_FLUSH_RESET_PERMS on kprobe instruction pages arm64/mm: wire up CONFIG_ARCH_HAS_SET_DIRECT_MAP arm64: module: create module allocations without exec permissions arm64: Allow user selection of ARM64_MODULE_PLTS acpi/arm64: ignore 5.1 FADTs that are reported as 5.0 arm64: Allow selecting Pseudo-NMI again ...
173 lines
4.8 KiB
C
173 lines
4.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012 ARM Ltd.
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*/
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#ifndef __ASM_FP_H
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#define __ASM_FP_H
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#include <asm/errno.h>
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#include <asm/ptrace.h>
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#include <asm/processor.h>
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#include <asm/sigcontext.h>
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#include <asm/sysreg.h>
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#ifndef __ASSEMBLY__
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#include <linux/bitmap.h>
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#include <linux/build_bug.h>
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#include <linux/bug.h>
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#include <linux/cache.h>
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#include <linux/init.h>
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#include <linux/stddef.h>
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#include <linux/types.h>
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#if defined(__KERNEL__) && defined(CONFIG_COMPAT)
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/* Masks for extracting the FPSR and FPCR from the FPSCR */
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#define VFP_FPSCR_STAT_MASK 0xf800009f
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#define VFP_FPSCR_CTRL_MASK 0x07f79f00
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/*
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* The VFP state has 32x64-bit registers and a single 32-bit
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* control/status register.
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*/
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#define VFP_STATE_SIZE ((32 * 8) + 4)
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#endif
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struct task_struct;
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extern void fpsimd_save_state(struct user_fpsimd_state *state);
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extern void fpsimd_load_state(struct user_fpsimd_state *state);
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extern void fpsimd_thread_switch(struct task_struct *next);
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extern void fpsimd_flush_thread(void);
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extern void fpsimd_signal_preserve_current_state(void);
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extern void fpsimd_preserve_current_state(void);
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extern void fpsimd_restore_current_state(void);
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extern void fpsimd_update_current_state(struct user_fpsimd_state const *state);
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extern void fpsimd_bind_task_to_cpu(void);
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extern void fpsimd_bind_state_to_cpu(struct user_fpsimd_state *state,
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void *sve_state, unsigned int sve_vl);
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extern void fpsimd_flush_task_state(struct task_struct *target);
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extern void fpsimd_save_and_flush_cpu_state(void);
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/* Maximum VL that SVE VL-agnostic software can transparently support */
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#define SVE_VL_ARCH_MAX 0x100
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/* Offset of FFR in the SVE register dump */
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static inline size_t sve_ffr_offset(int vl)
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{
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return SVE_SIG_FFR_OFFSET(sve_vq_from_vl(vl)) - SVE_SIG_REGS_OFFSET;
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}
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static inline void *sve_pffr(struct thread_struct *thread)
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{
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return (char *)thread->sve_state + sve_ffr_offset(thread->sve_vl);
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}
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extern void sve_save_state(void *state, u32 *pfpsr);
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extern void sve_load_state(void const *state, u32 const *pfpsr,
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unsigned long vq_minus_1);
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extern unsigned int sve_get_vl(void);
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struct arm64_cpu_capabilities;
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extern void sve_kernel_enable(const struct arm64_cpu_capabilities *__unused);
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extern u64 read_zcr_features(void);
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extern int __ro_after_init sve_max_vl;
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extern int __ro_after_init sve_max_virtualisable_vl;
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extern __ro_after_init DECLARE_BITMAP(sve_vq_map, SVE_VQ_MAX);
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/*
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* Helpers to translate bit indices in sve_vq_map to VQ values (and
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* vice versa). This allows find_next_bit() to be used to find the
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* _maximum_ VQ not exceeding a certain value.
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*/
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static inline unsigned int __vq_to_bit(unsigned int vq)
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{
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return SVE_VQ_MAX - vq;
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}
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static inline unsigned int __bit_to_vq(unsigned int bit)
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{
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return SVE_VQ_MAX - bit;
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}
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/* Ensure vq >= SVE_VQ_MIN && vq <= SVE_VQ_MAX before calling this function */
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static inline bool sve_vq_available(unsigned int vq)
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{
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return test_bit(__vq_to_bit(vq), sve_vq_map);
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}
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#ifdef CONFIG_ARM64_SVE
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extern size_t sve_state_size(struct task_struct const *task);
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extern void sve_alloc(struct task_struct *task);
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extern void fpsimd_release_task(struct task_struct *task);
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extern void fpsimd_sync_to_sve(struct task_struct *task);
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extern void sve_sync_to_fpsimd(struct task_struct *task);
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extern void sve_sync_from_fpsimd_zeropad(struct task_struct *task);
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extern int sve_set_vector_length(struct task_struct *task,
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unsigned long vl, unsigned long flags);
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extern int sve_set_current_vl(unsigned long arg);
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extern int sve_get_current_vl(void);
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static inline void sve_user_disable(void)
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{
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sysreg_clear_set(cpacr_el1, CPACR_EL1_ZEN_EL0EN, 0);
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}
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static inline void sve_user_enable(void)
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{
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sysreg_clear_set(cpacr_el1, 0, CPACR_EL1_ZEN_EL0EN);
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}
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/*
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* Probing and setup functions.
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* Calls to these functions must be serialised with one another.
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*/
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extern void __init sve_init_vq_map(void);
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extern void sve_update_vq_map(void);
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extern int sve_verify_vq_map(void);
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extern void __init sve_setup(void);
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#else /* ! CONFIG_ARM64_SVE */
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static inline void sve_alloc(struct task_struct *task) { }
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static inline void fpsimd_release_task(struct task_struct *task) { }
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static inline void sve_sync_to_fpsimd(struct task_struct *task) { }
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static inline void sve_sync_from_fpsimd_zeropad(struct task_struct *task) { }
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static inline int sve_set_current_vl(unsigned long arg)
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{
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return -EINVAL;
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}
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static inline int sve_get_current_vl(void)
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{
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return -EINVAL;
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}
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static inline void sve_user_disable(void) { BUILD_BUG(); }
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static inline void sve_user_enable(void) { BUILD_BUG(); }
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static inline void sve_init_vq_map(void) { }
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static inline void sve_update_vq_map(void) { }
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static inline int sve_verify_vq_map(void) { return 0; }
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static inline void sve_setup(void) { }
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#endif /* ! CONFIG_ARM64_SVE */
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/* For use by EFI runtime services calls only */
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extern void __efi_fpsimd_begin(void);
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extern void __efi_fpsimd_end(void);
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#endif
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#endif
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