linux_dsm_epyc7002/arch
Andre Przywara 0f1321172e arm: dts: calxeda: Provide UART clock
The PL011 UART binding requires two clocks to be named in a node.
Add the second clock, which is the bus gate, that just gets enabled.
Since this is a fixed clock anyway, it doesn't make any difference.

Link: https://lore.kernel.org/r/20200228135106.220620-3-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-26 10:52:19 +01:00
..
alpha Kbuild updates for v5.6 (2nd) 2020-02-09 16:05:50 -08:00
arc
arm arm: dts: calxeda: Provide UART clock 2020-03-26 10:52:19 +01:00
arm64 arm64: dts: Amlogic updates for v5.7 (round 2) 2020-03-25 22:30:26 +01:00
c6x
csky csky: Replace <linux/clk-provider.h> by <linux/of_clk.h> 2020-02-23 12:48:55 +08:00
h8300
hexagon
ia64
m68k
microblaze
mips MIPS: ingenic: DTS: Fix watchdog nodes 2020-02-19 10:52:35 -08:00
nds32
nios2
openrisc
parisc
powerpc powerpc/entry: Fix an #if which should be an #ifdef in entry_32.S 2020-02-19 10:35:22 +11:00
riscv riscv: adjust the indent 2020-02-24 13:12:53 -08:00
s390 s390/qdio: fill SBALEs with absolute addresses 2020-02-19 17:26:32 +01:00
sh
sparc Kbuild updates for v5.6 (2nd) 2020-02-09 16:05:50 -08:00
um
unicore32
x86 More bugfixes, including a few remaining "make W=1" issues such 2020-03-01 15:16:35 -06:00
xtensa
.gitignore
Kconfig