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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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c130a7602e
Registers have moved around across TSENS generations. For example, the CTRL register was at offset 0x0 in the SROT region on msm8916 but is at offset 0x4 in newer v2 based TSENS HW blocks. Allow passing offsets of important registers so that we can continue to use common functions. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
106 lines
2.7 KiB
C
106 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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*/
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#include <linux/platform_device.h>
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#include "tsens.h"
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/* eeprom layout data for 8916 */
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#define BASE0_MASK 0x0000007f
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#define BASE1_MASK 0xfe000000
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#define BASE0_SHIFT 0
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#define BASE1_SHIFT 25
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#define S0_P1_MASK 0x00000f80
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#define S1_P1_MASK 0x003e0000
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#define S2_P1_MASK 0xf8000000
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#define S3_P1_MASK 0x000003e0
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#define S4_P1_MASK 0x000f8000
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#define S0_P2_MASK 0x0001f000
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#define S1_P2_MASK 0x07c00000
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#define S2_P2_MASK 0x0000001f
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#define S3_P2_MASK 0x00007c00
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#define S4_P2_MASK 0x01f00000
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#define S0_P1_SHIFT 7
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#define S1_P1_SHIFT 17
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#define S2_P1_SHIFT 27
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#define S3_P1_SHIFT 5
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#define S4_P1_SHIFT 15
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#define S0_P2_SHIFT 12
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#define S1_P2_SHIFT 22
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#define S2_P2_SHIFT 0
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#define S3_P2_SHIFT 10
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#define S4_P2_SHIFT 20
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#define CAL_SEL_MASK 0xe0000000
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#define CAL_SEL_SHIFT 29
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static int calibrate_8916(struct tsens_device *tmdev)
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{
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int base0 = 0, base1 = 0, i;
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u32 p1[5], p2[5];
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int mode = 0;
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u32 *qfprom_cdata, *qfprom_csel;
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qfprom_cdata = (u32 *)qfprom_read(tmdev->dev, "calib");
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if (IS_ERR(qfprom_cdata))
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return PTR_ERR(qfprom_cdata);
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qfprom_csel = (u32 *)qfprom_read(tmdev->dev, "calib_sel");
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if (IS_ERR(qfprom_csel))
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return PTR_ERR(qfprom_csel);
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mode = (qfprom_csel[0] & CAL_SEL_MASK) >> CAL_SEL_SHIFT;
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dev_dbg(tmdev->dev, "calibration mode is %d\n", mode);
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switch (mode) {
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case TWO_PT_CALIB:
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base1 = (qfprom_cdata[1] & BASE1_MASK) >> BASE1_SHIFT;
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p2[0] = (qfprom_cdata[0] & S0_P2_MASK) >> S0_P2_SHIFT;
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p2[1] = (qfprom_cdata[0] & S1_P2_MASK) >> S1_P2_SHIFT;
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p2[2] = (qfprom_cdata[1] & S2_P2_MASK) >> S2_P2_SHIFT;
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p2[3] = (qfprom_cdata[1] & S3_P2_MASK) >> S3_P2_SHIFT;
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p2[4] = (qfprom_cdata[1] & S4_P2_MASK) >> S4_P2_SHIFT;
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for (i = 0; i < tmdev->num_sensors; i++)
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p2[i] = ((base1 + p2[i]) << 3);
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/* Fall through */
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case ONE_PT_CALIB2:
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base0 = (qfprom_cdata[0] & BASE0_MASK);
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p1[0] = (qfprom_cdata[0] & S0_P1_MASK) >> S0_P1_SHIFT;
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p1[1] = (qfprom_cdata[0] & S1_P1_MASK) >> S1_P1_SHIFT;
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p1[2] = (qfprom_cdata[0] & S2_P1_MASK) >> S2_P1_SHIFT;
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p1[3] = (qfprom_cdata[1] & S3_P1_MASK) >> S3_P1_SHIFT;
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p1[4] = (qfprom_cdata[1] & S4_P1_MASK) >> S4_P1_SHIFT;
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for (i = 0; i < tmdev->num_sensors; i++)
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p1[i] = (((base0) + p1[i]) << 3);
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break;
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default:
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for (i = 0; i < tmdev->num_sensors; i++) {
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p1[i] = 500;
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p2[i] = 780;
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}
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break;
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}
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compute_intercept_slope(tmdev, p1, p2, mode);
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return 0;
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}
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static const struct tsens_ops ops_8916 = {
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.init = init_common,
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.calibrate = calibrate_8916,
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.get_temp = get_temp_common,
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};
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const struct tsens_data data_8916 = {
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.num_sensors = 5,
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.ops = &ops_8916,
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.reg_offsets = { [SROT_CTRL_OFFSET] = 0x0 },
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.hw_ids = (unsigned int []){0, 1, 2, 4, 5 },
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};
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