mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-16 07:07:34 +07:00
bb0fd7ab09
Pull ARM updates from Russell King:
"Included in this update are both some long term fixes and some new
features.
Fixes:
- An integer overflow in the calculation of ELF_ET_DYN_BASE.
- Avoiding OOMs for high-order IOMMU allocations
- SMP requires the data cache to be enabled for synchronisation
primitives to work, so prevent the CPU_DCACHE_DISABLE option being
visible on SMP builds.
- A bug going back 10+ years in the noMMU ARM94* CPU support code,
where it corrupts registers. Found by folk getting Linux running
on their cameras.
- Versatile Express needs an errata workaround enabled for CPU
hot-unplug to work.
Features:
- Clean up module linker by handling out of range relocations
separately from relocation cases we don't handle.
- Fix a long term bug in the pci_mmap_page_range() code, which we
hope won't impact userspace (we hope there's no users of the
existing broken interface.)
- Don't map DMA coherent allocations when we don't have a MMU.
- Drop experimental status for SMP_ON_UP.
- Warn when DT doesn't specify ePAPR mandatory cache properties.
- Add documentation concerning how we find the start of physical
memory for AUTO_ZRELADDR kernels, detailing why we have chosen the
mask and the implications of changing it.
- Updates from Ard Biesheuvel to address some issues with large
kernels (such as allyesconfig) failing to link.
- Allow hibernation to work on modern (ARMv7) CPUs - this appears to
have never worked in the past on these CPUs.
- Enable IRQ_SHOW_LEVEL, which changes the /proc/interrupts output
format (hopefully without userspace breaking... let's hope that if
it causes someone a problem, they tell us.)
- Fix tegra-ahb DT offsets.
- Rework ARM errata 643719 code (and ARMv7 flush_cache_louis()/
flush_dcache_all()) code to be more efficient, and enable this
errata workaround by default for ARMv7+SMP CPUs. This complements
the Versatile Express fix above.
- Rework ARMv7 context code for errata 430973, so that only Cortex A8
CPUs are impacted by the branch target buffer flush when this
errata is enabled. Also update the help text to indicate that all
r1p* A8 CPUs are impacted.
- Switch ARM to the generic show_mem() implementation, it conveys all
the information which we were already reporting.
- Prevent slow timer sources being used for udelay() - timers running
at less than 1MHz are not useful for this, and can cause udelay()
to return immediately, without any wait. Using such a slow timer
is silly.
- VDSO support for 32-bit ARM, mainly for gettimeofday() using the
ARM architected timer.
- Perf support for Scorpion performance monitoring units"
vdso semantic conflict fixed up as per linux-next.
* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (52 commits)
ARM: update errata 430973 documentation to cover Cortex A8 r1p*
ARM: ensure delay timer has sufficient accuracy for delays
ARM: switch to use the generic show_mem() implementation
ARM: proc-v7: avoid errata 430973 workaround for non-Cortex A8 CPUs
ARM: enable ARM errata 643719 workaround by default
ARM: cache-v7: optimise test for Cortex A9 r0pX devices
ARM: cache-v7: optimise branches in v7_flush_cache_louis
ARM: cache-v7: consolidate initialisation of cache level index
ARM: cache-v7: shift CLIDR to extract appropriate field before masking
ARM: cache-v7: use movw/movt instructions
ARM: allow 16-bit instructions in ALT_UP()
ARM: proc-arm94*.S: fix setup function
ARM: vexpress: fix CPU hotplug with CT9x4 tile.
ARM: 8276/1: Make CPU_DCACHE_DISABLE depend on !SMP
ARM: 8335/1: Documentation: DT bindings: Tegra AHB: document the legacy base address
ARM: 8334/1: amba: tegra-ahb: detect and correct bogus base address
ARM: 8333/1: amba: tegra-ahb: fix register offsets in the macros
ARM: 8339/1: Enable CONFIG_GENERIC_IRQ_SHOW_LEVEL
ARM: 8338/1: kexec: Relax SMP validation to improve DT compatibility
ARM: 8337/1: mm: Do not invoke OOM for higher order IOMMU DMA allocations
...
144 lines
4.3 KiB
C
144 lines
4.3 KiB
C
#ifndef __ASMARM_ELF_H
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#define __ASMARM_ELF_H
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#include <asm/auxvec.h>
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#include <asm/hwcap.h>
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#include <asm/vdso_datapage.h>
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/*
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* ELF register definitions..
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*/
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#include <asm/ptrace.h>
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#include <asm/user.h>
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struct task_struct;
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typedef unsigned long elf_greg_t;
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typedef unsigned long elf_freg_t[3];
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#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
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typedef elf_greg_t elf_gregset_t[ELF_NGREG];
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typedef struct user_fp elf_fpregset_t;
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#define EF_ARM_EABI_MASK 0xff000000
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#define EF_ARM_EABI_UNKNOWN 0x00000000
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#define EF_ARM_EABI_VER1 0x01000000
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#define EF_ARM_EABI_VER2 0x02000000
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#define EF_ARM_EABI_VER3 0x03000000
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#define EF_ARM_EABI_VER4 0x04000000
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#define EF_ARM_EABI_VER5 0x05000000
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#define EF_ARM_BE8 0x00800000 /* ABI 4,5 */
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#define EF_ARM_LE8 0x00400000 /* ABI 4,5 */
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#define EF_ARM_MAVERICK_FLOAT 0x00000800 /* ABI 0 */
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#define EF_ARM_VFP_FLOAT 0x00000400 /* ABI 0 */
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#define EF_ARM_SOFT_FLOAT 0x00000200 /* ABI 0 */
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#define EF_ARM_OLD_ABI 0x00000100 /* ABI 0 */
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#define EF_ARM_NEW_ABI 0x00000080 /* ABI 0 */
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#define EF_ARM_ALIGN8 0x00000040 /* ABI 0 */
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#define EF_ARM_PIC 0x00000020 /* ABI 0 */
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#define EF_ARM_MAPSYMSFIRST 0x00000010 /* ABI 2 */
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#define EF_ARM_APCS_FLOAT 0x00000010 /* ABI 0, floats in fp regs */
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#define EF_ARM_DYNSYMSUSESEGIDX 0x00000008 /* ABI 2 */
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#define EF_ARM_APCS_26 0x00000008 /* ABI 0 */
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#define EF_ARM_SYMSARESORTED 0x00000004 /* ABI 1,2 */
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#define EF_ARM_INTERWORK 0x00000004 /* ABI 0 */
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#define EF_ARM_HASENTRY 0x00000002 /* All */
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#define EF_ARM_RELEXEC 0x00000001 /* All */
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#define R_ARM_NONE 0
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#define R_ARM_PC24 1
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#define R_ARM_ABS32 2
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#define R_ARM_CALL 28
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#define R_ARM_JUMP24 29
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#define R_ARM_TARGET1 38
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#define R_ARM_V4BX 40
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#define R_ARM_PREL31 42
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#define R_ARM_MOVW_ABS_NC 43
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#define R_ARM_MOVT_ABS 44
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#define R_ARM_THM_CALL 10
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#define R_ARM_THM_JUMP24 30
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#define R_ARM_THM_MOVW_ABS_NC 47
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#define R_ARM_THM_MOVT_ABS 48
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/*
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* These are used to set parameters in the core dumps.
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*/
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#define ELF_CLASS ELFCLASS32
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#ifdef __ARMEB__
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#define ELF_DATA ELFDATA2MSB
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#else
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#define ELF_DATA ELFDATA2LSB
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#endif
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#define ELF_ARCH EM_ARM
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/*
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* This yields a string that ld.so will use to load implementation
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* specific libraries for optimization. This is more specific in
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* intent than poking at uname or /proc/cpuinfo.
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*
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* For now we just provide a fairly general string that describes the
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* processor family. This could be made more specific later if someone
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* implemented optimisations that require it. 26-bit CPUs give you
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* "v1l" for ARM2 (no SWP) and "v2l" for anything else (ARM1 isn't
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* supported). 32-bit CPUs give you "v3[lb]" for anything based on an
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* ARM6 or ARM7 core and "armv4[lb]" for anything based on a StrongARM-1
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* core.
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*/
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#define ELF_PLATFORM_SIZE 8
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#define ELF_PLATFORM (elf_platform)
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extern char elf_platform[];
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struct elf32_hdr;
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/*
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* This is used to ensure we don't load something for the wrong architecture.
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*/
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extern int elf_check_arch(const struct elf32_hdr *);
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#define elf_check_arch elf_check_arch
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#define vmcore_elf64_check_arch(x) (0)
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extern int arm_elf_read_implies_exec(const struct elf32_hdr *, int);
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#define elf_read_implies_exec(ex,stk) arm_elf_read_implies_exec(&(ex), stk)
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struct task_struct;
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int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs);
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#define ELF_CORE_COPY_TASK_REGS dump_task_regs
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#define CORE_DUMP_USE_REGSET
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#define ELF_EXEC_PAGESIZE 4096
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/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
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use of this is to invoke "./ld.so someprog" to test out a new version of
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the loader. We need to make sure that it is out of the way of the program
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that it will "exec", and that there is sufficient room for the brk. */
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#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2)
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/* When the program starts, a1 contains a pointer to a function to be
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registered with atexit, as per the SVR4 ABI. A value of 0 means we
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have no such handler. */
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#define ELF_PLAT_INIT(_r, load_addr) (_r)->ARM_r0 = 0
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extern void elf_set_personality(const struct elf32_hdr *);
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#define SET_PERSONALITY(ex) elf_set_personality(&(ex))
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#ifdef CONFIG_MMU
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#ifdef CONFIG_VDSO
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#define ARCH_DLINFO \
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do { \
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NEW_AUX_ENT(AT_SYSINFO_EHDR, \
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(elf_addr_t)current->mm->context.vdso); \
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} while (0)
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#endif
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#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
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struct linux_binprm;
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int arch_setup_additional_pages(struct linux_binprm *, int);
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#endif
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#endif
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