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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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0ebbab3742
Allocate basic xHCI host controller data structures. For every xHC, there is a command ring, an event ring, and a doorbell array. The doorbell array is used to notify the host controller that work has been enqueued onto one of the rings. The host controller driver enqueues commands on the command ring. The HW enqueues command completion events on the event ring and interrupts the system (currently using PCI interrupts, although the xHCI HW will use MSI interrupts eventually). All rings and the doorbell array must be allocated by the xHCI host controller driver. Each ring is comprised of one or more segments, which consists of 16-byte Transfer Request Blocks (TRBs) that can be chained to form a Transfer Descriptor (TD) that represents a multiple-buffer request. Segments are linked into a ring using Link TRBs, which means they are dynamically growable. The producer of the ring enqueues a TD by writing one or more TRBs in the ring and toggling the TRB cycle bit for each TRB. The consumer knows it can process the TRB when the cycle bit matches its internal consumer cycle state for the ring. The consumer cycle state is toggled an odd amount of times in the ring. An example ring (a ring must have a minimum of 16 TRBs on it, but that's too big to draw in ASCII art): chain cycle bit bit ------------------------ | TD A TRB 1 | 1 | 1 |<------------- <-- consumer dequeue ptr ------------------------ | consumer cycle state = 1 | TD A TRB 2 | 1 | 1 | | ------------------------ | | TD A TRB 3 | 0 | 1 | segment 1 | ------------------------ | | TD B TRB 1 | 1 | 1 | | ------------------------ | | TD B TRB 2 | 0 | 1 | | ------------------------ | | Link TRB | 0 | 1 |----- | ------------------------ | | | | chain cycle | | bit bit | | ------------------------ | | | TD C TRB 1 | 0 | 1 |<---- | ------------------------ | | TD D TRB 1 | 1 | 1 | | ------------------------ | | TD D TRB 2 | 1 | 1 | segment 2 | ------------------------ | | TD D TRB 3 | 1 | 1 | | ------------------------ | | TD D TRB 4 | 1 | 1 | | ------------------------ | | Link TRB | 1 | 1 |----- | ------------------------ | | | | chain cycle | | bit bit | | ------------------------ | | | TD D TRB 5 | 1 | 1 |<---- | ------------------------ | | TD D TRB 6 | 0 | 1 | | ------------------------ | | TD E TRB 1 | 0 | 1 | segment 3 | ------------------------ | | | 0 | 0 | | <-- producer enqueue ptr ------------------------ | | | 0 | 0 | | ------------------------ | | Link TRB | 0 | 0 |--------------- ------------------------ Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> |
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.. | ||
whci | ||
ehci-au1xxx.c | ||
ehci-dbg.c | ||
ehci-fsl.c | ||
ehci-fsl.h | ||
ehci-hcd.c | ||
ehci-hub.c | ||
ehci-ixp4xx.c | ||
ehci-mem.c | ||
ehci-orion.c | ||
ehci-pci.c | ||
ehci-ppc-of.c | ||
ehci-ps3.c | ||
ehci-q.c | ||
ehci-sched.c | ||
ehci.h | ||
fhci-dbg.c | ||
fhci-hcd.c | ||
fhci-hub.c | ||
fhci-mem.c | ||
fhci-q.c | ||
fhci-sched.c | ||
fhci-tds.c | ||
fhci.h | ||
hwa-hc.c | ||
isp116x-hcd.c | ||
isp116x.h | ||
isp1760-hcd.c | ||
isp1760-hcd.h | ||
isp1760-if.c | ||
Kconfig | ||
Makefile | ||
ohci-at91.c | ||
ohci-au1xxx.c | ||
ohci-dbg.c | ||
ohci-ep93xx.c | ||
ohci-hcd.c | ||
ohci-hub.c | ||
ohci-lh7a404.c | ||
ohci-mem.c | ||
ohci-omap.c | ||
ohci-pci.c | ||
ohci-pnx4008.c | ||
ohci-pnx8550.c | ||
ohci-ppc-of.c | ||
ohci-ppc-soc.c | ||
ohci-ps3.c | ||
ohci-pxa27x.c | ||
ohci-q.c | ||
ohci-s3c2410.c | ||
ohci-sa1111.c | ||
ohci-sh.c | ||
ohci-sm501.c | ||
ohci-ssb.c | ||
ohci-tmio.c | ||
ohci.h | ||
oxu210hp-hcd.c | ||
oxu210hp.h | ||
pci-quirks.c | ||
pci-quirks.h | ||
r8a66597-hcd.c | ||
r8a66597.h | ||
sl811_cs.c | ||
sl811-hcd.c | ||
sl811.h | ||
u132-hcd.c | ||
uhci-debug.c | ||
uhci-hcd.c | ||
uhci-hcd.h | ||
uhci-hub.c | ||
uhci-q.c | ||
xhci-dbg.c | ||
xhci-ext-caps.h | ||
xhci-hcd.c | ||
xhci-mem.c | ||
xhci-pci.c | ||
xhci.h |