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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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2e5f032095
Add support for the Marvell 88E6131 switch chip. This chip only supports the original (ethertype-less) DSA tagging format. On the 88E6131, there is a PHY Polling Unit (PPU) which has exclusive access to each of the PHYs's MII management registers. If we want to talk to the PHYs from software, we have to disable the PPU and wait for it to complete its current transaction before we can do so, and we need to re-enable the PPU afterwards to make sure that the switch will notice changes in link state and speed on the individual ports as they occur. Since disabling the PPU is rather slow, and since MII management accesses are typically done in bursts, this patch keeps the PPU disabled for 10ms after a software access completes. This makes handling the PPU slightly more complex, but speeds up something like running ethtool on one of the switch slave interfaces from ~300ms to ~30ms on typical hardware. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Tested-by: Nicolas Pitre <nico@marvell.com> Tested-by: Peter van Valderen <linux@ddcrew.com> Tested-by: Dirk Teurlings <dirk@upexia.nl> Signed-off-by: David S. Miller <davem@davemloft.net>
94 lines
2.7 KiB
C
94 lines
2.7 KiB
C
/*
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* net/dsa/mv88e6xxx.h - Marvell 88e6xxx switch chip support
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* Copyright (c) 2008 Marvell Semiconductor
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __MV88E6XXX_H
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#define __MV88E6XXX_H
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#define REG_PORT(p) (0x10 + (p))
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#define REG_GLOBAL 0x1b
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#define REG_GLOBAL2 0x1c
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struct mv88e6xxx_priv_state {
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/*
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* When using multi-chip addressing, this mutex protects
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* access to the indirect access registers. (In single-chip
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* mode, this mutex is effectively useless.)
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*/
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struct mutex smi_mutex;
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#ifdef CONFIG_NET_DSA_MV88E6XXX_NEED_PPU
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/*
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* Handles automatic disabling and re-enabling of the PHY
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* polling unit.
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*/
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struct mutex ppu_mutex;
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int ppu_disabled;
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struct work_struct ppu_work;
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struct timer_list ppu_timer;
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#endif
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/*
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* This mutex serialises access to the statistics unit.
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* Hold this mutex over snapshot + dump sequences.
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*/
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struct mutex stats_mutex;
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};
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struct mv88e6xxx_hw_stat {
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char string[ETH_GSTRING_LEN];
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int sizeof_stat;
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int reg;
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};
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int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg);
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int mv88e6xxx_reg_read(struct dsa_switch *ds, int addr, int reg);
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int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr,
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int reg, u16 val);
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int mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, u16 val);
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int mv88e6xxx_config_prio(struct dsa_switch *ds);
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int mv88e6xxx_set_addr_direct(struct dsa_switch *ds, u8 *addr);
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int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr);
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int mv88e6xxx_phy_read(struct dsa_switch *ds, int addr, int regnum);
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int mv88e6xxx_phy_write(struct dsa_switch *ds, int addr, int regnum, u16 val);
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void mv88e6xxx_ppu_state_init(struct dsa_switch *ds);
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int mv88e6xxx_phy_read_ppu(struct dsa_switch *ds, int addr, int regnum);
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int mv88e6xxx_phy_write_ppu(struct dsa_switch *ds, int addr,
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int regnum, u16 val);
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void mv88e6xxx_poll_link(struct dsa_switch *ds);
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void mv88e6xxx_get_strings(struct dsa_switch *ds,
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int nr_stats, struct mv88e6xxx_hw_stat *stats,
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int port, uint8_t *data);
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void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds,
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int nr_stats, struct mv88e6xxx_hw_stat *stats,
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int port, uint64_t *data);
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#define REG_READ(addr, reg) \
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({ \
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int __ret; \
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\
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__ret = mv88e6xxx_reg_read(ds, addr, reg); \
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if (__ret < 0) \
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return __ret; \
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__ret; \
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})
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#define REG_WRITE(addr, reg, val) \
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({ \
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int __ret; \
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\
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__ret = mv88e6xxx_reg_write(ds, addr, reg, val); \
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if (__ret < 0) \
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return __ret; \
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})
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#endif
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