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
It is an optimization and a cleanup, and adds the following new generic percpu methods: percpu_read() percpu_write() percpu_add() percpu_sub() percpu_and() percpu_or() percpu_xor() and implements support for them on x86. (other architectures will fall back to a default implementation) The advantage is that for example to read a local percpu variable, instead of this sequence: return __get_cpu_var(var); ffffffff8102ca2b: 48 8b 14 fd 80 09 74 mov -0x7e8bf680(,%rdi,8),%rdx ffffffff8102ca32: 81 ffffffff8102ca33: 48 c7 c0 d8 59 00 00 mov $0x59d8,%rax ffffffff8102ca3a: 48 8b 04 10 mov (%rax,%rdx,1),%rax We can get a single instruction by using the optimized variants: return percpu_read(var); ffffffff8102ca3f: 65 48 8b 05 91 8f fd mov %gs:0x7efd8f91(%rip),%rax I also cleaned up the x86-specific APIs and made the x86 code use these new generic percpu primitives. tj: * fixed generic percpu_sub() definition as Roel Kluin pointed out * added percpu_and() for completeness's sake * made generic percpu ops atomic against preemption Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Tejun Heo <tj@kernel.org>
32 lines
642 B
C
32 lines
642 B
C
/*
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* Per-cpu current frame pointer - the location of the last exception frame on
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* the stack, stored in the per-cpu area.
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*
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* Jeremy Fitzhardinge <jeremy@goop.org>
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*/
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#ifndef _ASM_X86_IRQ_REGS_32_H
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#define _ASM_X86_IRQ_REGS_32_H
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#include <asm/percpu.h>
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#define ARCH_HAS_OWN_IRQ_REGS
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DECLARE_PER_CPU(struct pt_regs *, irq_regs);
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static inline struct pt_regs *get_irq_regs(void)
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{
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return percpu_read(irq_regs);
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}
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static inline struct pt_regs *set_irq_regs(struct pt_regs *new_regs)
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{
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struct pt_regs *old_regs;
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old_regs = get_irq_regs();
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percpu_write(irq_regs, new_regs);
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return old_regs;
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}
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#endif /* _ASM_X86_IRQ_REGS_32_H */
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