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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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96d4f267e4
Nobody has actually used the type (VERIFY_READ vs VERIFY_WRITE) argument of the user address range verification function since we got rid of the old racy i386-only code to walk page tables by hand. It existed because the original 80386 would not honor the write protect bit when in kernel mode, so you had to do COW by hand before doing any user access. But we haven't supported that in a long time, and these days the 'type' argument is a purely historical artifact. A discussion about extending 'user_access_begin()' to do the range checking resulted this patch, because there is no way we're going to move the old VERIFY_xyz interface to that model. And it's best done at the end of the merge window when I've done most of my merges, so let's just get this done once and for all. This patch was mostly done with a sed-script, with manual fix-ups for the cases that weren't of the trivial 'access_ok(VERIFY_xyz' form. There were a couple of notable cases: - csky still had the old "verify_area()" name as an alias. - the iter_iov code had magical hardcoded knowledge of the actual values of VERIFY_{READ,WRITE} (not that they mattered, since nothing really used it) - microblaze used the type argument for a debug printout but other than those oddities this should be a total no-op patch. I tried to fix up all architectures, did fairly extensive grepping for access_ok() uses, and the changes are trivial, but I may have missed something. Any missed conversion should be trivially fixable, though. Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
262 lines
6.7 KiB
C
262 lines
6.7 KiB
C
/*
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* linux/arch/arm/kernel/swp_emulate.c
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*
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* Copyright (C) 2009 ARM Limited
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* __user_* functions adapted from include/asm/uaccess.h
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Implements emulation of the SWP/SWPB instructions using load-exclusive and
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* store-exclusive for processors that have them disabled (or future ones that
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* might not implement them).
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*
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* Syntax of SWP{B} instruction: SWP{B}<c> <Rt>, <Rt2>, [<Rn>]
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* Where: Rt = destination
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* Rt2 = source
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* Rn = address
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/proc_fs.h>
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#include <linux/seq_file.h>
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#include <linux/sched.h>
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#include <linux/sched/mm.h>
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#include <linux/syscalls.h>
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#include <linux/perf_event.h>
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#include <asm/opcodes.h>
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#include <asm/system_info.h>
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#include <asm/traps.h>
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#include <linux/uaccess.h>
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/*
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* Error-checking SWP macros implemented using ldrex{b}/strex{b}
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*/
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#define __user_swpX_asm(data, addr, res, temp, B) \
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__asm__ __volatile__( \
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"0: ldrex"B" %2, [%3]\n" \
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"1: strex"B" %0, %1, [%3]\n" \
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" cmp %0, #0\n" \
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" moveq %1, %2\n" \
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" movne %0, %4\n" \
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"2:\n" \
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" .section .text.fixup,\"ax\"\n" \
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" .align 2\n" \
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"3: mov %0, %5\n" \
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" b 2b\n" \
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" .previous\n" \
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" .section __ex_table,\"a\"\n" \
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" .align 3\n" \
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" .long 0b, 3b\n" \
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" .long 1b, 3b\n" \
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" .previous" \
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: "=&r" (res), "+r" (data), "=&r" (temp) \
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: "r" (addr), "i" (-EAGAIN), "i" (-EFAULT) \
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: "cc", "memory")
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#define __user_swp_asm(data, addr, res, temp) \
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__user_swpX_asm(data, addr, res, temp, "")
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#define __user_swpb_asm(data, addr, res, temp) \
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__user_swpX_asm(data, addr, res, temp, "b")
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/*
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* Macros/defines for extracting register numbers from instruction.
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*/
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#define EXTRACT_REG_NUM(instruction, offset) \
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(((instruction) & (0xf << (offset))) >> (offset))
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#define RN_OFFSET 16
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#define RT_OFFSET 12
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#define RT2_OFFSET 0
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/*
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* Bit 22 of the instruction encoding distinguishes between
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* the SWP and SWPB variants (bit set means SWPB).
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*/
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#define TYPE_SWPB (1 << 22)
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static unsigned long swpcounter;
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static unsigned long swpbcounter;
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static unsigned long abtcounter;
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static pid_t previous_pid;
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#ifdef CONFIG_PROC_FS
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static int proc_status_show(struct seq_file *m, void *v)
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{
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seq_printf(m, "Emulated SWP:\t\t%lu\n", swpcounter);
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seq_printf(m, "Emulated SWPB:\t\t%lu\n", swpbcounter);
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seq_printf(m, "Aborted SWP{B}:\t\t%lu\n", abtcounter);
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if (previous_pid != 0)
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seq_printf(m, "Last process:\t\t%d\n", previous_pid);
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return 0;
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}
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#endif
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/*
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* Set up process info to signal segmentation fault - called on access error.
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*/
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static void set_segfault(struct pt_regs *regs, unsigned long addr)
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{
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int si_code;
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down_read(¤t->mm->mmap_sem);
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if (find_vma(current->mm, addr) == NULL)
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si_code = SEGV_MAPERR;
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else
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si_code = SEGV_ACCERR;
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up_read(¤t->mm->mmap_sem);
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pr_debug("SWP{B} emulation: access caused memory abort!\n");
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arm_notify_die("Illegal memory access", regs,
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SIGSEGV, si_code,
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(void __user *)instruction_pointer(regs),
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0, 0);
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abtcounter++;
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}
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static int emulate_swpX(unsigned int address, unsigned int *data,
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unsigned int type)
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{
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unsigned int res = 0;
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if ((type != TYPE_SWPB) && (address & 0x3)) {
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/* SWP to unaligned address not permitted */
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pr_debug("SWP instruction on unaligned pointer!\n");
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return -EFAULT;
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}
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while (1) {
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unsigned long temp;
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unsigned int __ua_flags;
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__ua_flags = uaccess_save_and_enable();
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if (type == TYPE_SWPB)
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__user_swpb_asm(*data, address, res, temp);
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else
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__user_swp_asm(*data, address, res, temp);
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uaccess_restore(__ua_flags);
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if (likely(res != -EAGAIN) || signal_pending(current))
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break;
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cond_resched();
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}
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if (res == 0) {
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if (type == TYPE_SWPB)
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swpbcounter++;
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else
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swpcounter++;
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}
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return res;
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}
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/*
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* swp_handler logs the id of calling process, dissects the instruction, sanity
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* checks the memory location, calls emulate_swpX for the actual operation and
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* deals with fixup/error handling before returning
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*/
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static int swp_handler(struct pt_regs *regs, unsigned int instr)
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{
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unsigned int address, destreg, data, type;
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unsigned int res = 0;
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perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->ARM_pc);
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res = arm_check_condition(instr, regs->ARM_cpsr);
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switch (res) {
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case ARM_OPCODE_CONDTEST_PASS:
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break;
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case ARM_OPCODE_CONDTEST_FAIL:
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/* Condition failed - return to next instruction */
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regs->ARM_pc += 4;
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return 0;
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case ARM_OPCODE_CONDTEST_UNCOND:
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/* If unconditional encoding - not a SWP, undef */
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return -EFAULT;
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default:
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return -EINVAL;
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}
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if (current->pid != previous_pid) {
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pr_debug("\"%s\" (%ld) uses deprecated SWP{B} instruction\n",
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current->comm, (unsigned long)current->pid);
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previous_pid = current->pid;
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}
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address = regs->uregs[EXTRACT_REG_NUM(instr, RN_OFFSET)];
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data = regs->uregs[EXTRACT_REG_NUM(instr, RT2_OFFSET)];
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destreg = EXTRACT_REG_NUM(instr, RT_OFFSET);
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type = instr & TYPE_SWPB;
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pr_debug("addr in r%d->0x%08x, dest is r%d, source in r%d->0x%08x)\n",
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EXTRACT_REG_NUM(instr, RN_OFFSET), address,
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destreg, EXTRACT_REG_NUM(instr, RT2_OFFSET), data);
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/* Check access in reasonable access range for both SWP and SWPB */
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if (!access_ok((address & ~3), 4)) {
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pr_debug("SWP{B} emulation: access to %p not allowed!\n",
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(void *)address);
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res = -EFAULT;
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} else {
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res = emulate_swpX(address, &data, type);
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}
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if (res == 0) {
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/*
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* On successful emulation, revert the adjustment to the PC
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* made in kernel/traps.c in order to resume execution at the
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* instruction following the SWP{B}.
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*/
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regs->ARM_pc += 4;
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regs->uregs[destreg] = data;
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} else if (res == -EFAULT) {
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/*
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* Memory errors do not mean emulation failed.
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* Set up signal info to return SEGV, then return OK
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*/
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set_segfault(regs, address);
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}
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return 0;
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}
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/*
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* Only emulate SWP/SWPB executed in ARM state/User mode.
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* The kernel must be SWP free and SWP{B} does not exist in Thumb/ThumbEE.
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*/
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static struct undef_hook swp_hook = {
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.instr_mask = 0x0fb00ff0,
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.instr_val = 0x01000090,
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.cpsr_mask = MODE_MASK | PSR_T_BIT | PSR_J_BIT,
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.cpsr_val = USR_MODE,
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.fn = swp_handler
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};
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/*
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* Register handler and create status file in /proc/cpu
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* Invoked as late_initcall, since not needed before init spawned.
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*/
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static int __init swp_emulation_init(void)
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{
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if (cpu_architecture() < CPU_ARCH_ARMv7)
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return 0;
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#ifdef CONFIG_PROC_FS
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if (!proc_create_single("cpu/swp_emulation", S_IRUGO, NULL,
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proc_status_show))
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return -ENOMEM;
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#endif /* CONFIG_PROC_FS */
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pr_notice("Registering SWP/SWPB emulation handler\n");
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register_undef_hook(&swp_hook);
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return 0;
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}
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late_initcall(swp_emulation_init);
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