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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms and conditions of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 59 temple place suite 330 boston ma 02111 1307 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 33 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190530000435.254582722@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
85 lines
1.9 KiB
C
85 lines
1.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* iq81340mc board support
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* Copyright (c) 2005-2006, Intel Corporation.
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*/
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#include <linux/pci.h>
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#include <mach/hardware.h>
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#include <asm/irq.h>
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#include <asm/mach/pci.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include "pci.h"
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#include <asm/mach/time.h>
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#include <mach/time.h>
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extern int init_atu; /* Flag to select which ATU(s) to initialize / disable */
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static int __init
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iq81340mc_pcix_map_irq(const struct pci_dev *dev, u8 idsel, u8 pin)
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{
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switch (idsel) {
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case 1:
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switch (pin) {
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case 1: return ATUX_INTB;
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case 2: return ATUX_INTC;
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case 3: return ATUX_INTD;
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case 4: return ATUX_INTA;
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default: return -1;
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}
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case 2:
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switch (pin) {
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case 1: return ATUX_INTC;
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case 2: return ATUX_INTD;
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case 3: return ATUX_INTC;
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case 4: return ATUX_INTD;
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default: return -1;
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}
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default: return -1;
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}
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}
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static struct hw_pci iq81340mc_pci __initdata = {
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.nr_controllers = 0,
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.setup = iop13xx_pci_setup,
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.map_irq = iq81340mc_pcix_map_irq,
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.scan = iop13xx_scan_bus,
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.preinit = iop13xx_pci_init,
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};
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static int __init iq81340mc_pci_init(void)
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{
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iop13xx_atu_select(&iq81340mc_pci);
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pci_common_init(&iq81340mc_pci);
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iop13xx_map_pci_memory();
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return 0;
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}
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static void __init iq81340mc_init(void)
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{
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iop13xx_platform_init();
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iq81340mc_pci_init();
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iop13xx_add_tpmi_devices();
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}
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static void __init iq81340mc_timer_init(void)
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{
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unsigned long bus_freq = iop13xx_core_freq() / iop13xx_xsi_bus_ratio();
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printk(KERN_DEBUG "%s: bus frequency: %lu\n", __func__, bus_freq);
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iop_init_time(bus_freq);
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}
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MACHINE_START(IQ81340MC, "Intel IQ81340MC")
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/* Maintainer: Dan Williams <dan.j.williams@intel.com> */
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.atag_offset = 0x100,
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.init_early = iop13xx_init_early,
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.map_io = iop13xx_map_io,
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.init_irq = iop13xx_init_irq,
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.init_time = iq81340mc_timer_init,
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.init_machine = iq81340mc_init,
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.restart = iop13xx_restart,
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.nr_irqs = NR_IOP13XX_IRQS,
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MACHINE_END
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