AuxXxilium/linux_dsm_epyc7002
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0d2200794f
linux_dsm_epyc7002/drivers/gpu/drm/mediatek
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Junzhi Zhao 0d2200794f drm/mediatek: modify the factor to make the pll_rate set in the 1G-2G range 
Currently, the code sets the "pll" to the desired multiple
of the pixel clock manully(4*3m 8*3,etc).  The valid range
of the pll is 1G-2G, however, when the pixel clock is bigger
than 167MHz,  the "pll" will be set to a invalid value( > 2G),
then the "pll" will be 2GHz, thus the pixel clock will be in
correct. Change the factor to make the "pll" be set in the
(1G, 2G) range.

Signed-off-by: Junzhi Zhao <junzhi.zhao@mediatek.com>
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
2016-10-19 09:07:08 +08:00
..
Kconfig drm/mediatek: add ARM_SMCCC dependency 2016-08-11 08:42:01 +02:00
Makefile drm/mediatek: Add HDMI support 2016-06-16 16:30:38 +02:00
mtk_cec.c drm/mediatek: Add HDMI support 2016-06-16 16:30:38 +02:00
mtk_cec.h drm/mediatek: Add HDMI support 2016-06-16 16:30:38 +02:00
mtk_disp_ovl.c drm/mediatek: clear IRQ status before enable OVL interrupt 2016-10-19 09:06:12 +08:00
mtk_disp_rdma.c drm/mediatek: set mt8173 dithering function 2016-08-11 10:52:23 +02:00
mtk_dpi_regs.h drm/mediatek: Add DPI sub driver 2016-05-06 17:47:38 +02:00
mtk_dpi.c drm/mediatek: modify the factor to make the pll_rate set in the 1G-2G range 2016-10-19 09:07:08 +08:00
mtk_drm_crtc.c Merge tag 'topic/drm-misc-2016-08-12' of git://anongit.freedesktop.org/drm-intel into drm-next 2016-08-15 16:46:36 +10:00
mtk_drm_crtc.h Merge tag 'topic/drm-misc-2016-08-12' of git://anongit.freedesktop.org/drm-intel into drm-next 2016-08-15 16:46:36 +10:00
mtk_drm_ddp_comp.c drm/mediatek: fix a typo of OD_CFG to OD_RELAYMODE 2016-10-19 09:03:20 +08:00
mtk_drm_ddp_comp.h drm/mediatek: set mt8173 dithering function 2016-08-11 10:52:23 +02:00
mtk_drm_ddp.c drm/mediatek: Add DRM Driver for Mediatek SoC MT8173. 2016-05-06 17:47:35 +02:00
mtk_drm_ddp.h drm/mediatek: Add DRM Driver for Mediatek SoC MT8173. 2016-05-06 17:47:35 +02:00
mtk_drm_drv.c drm/mediatek: set vblank_disable_allowed to true 2016-10-19 09:05:44 +08:00
mtk_drm_drv.h drm/mediatek: Add DPI sub driver 2016-05-06 17:47:38 +02:00
mtk_drm_fb.c drm: mediatek: fixup drm_gem_object_lookup API change 2016-05-18 19:16:16 +02:00
mtk_drm_fb.h drm/mediatek: Add DRM Driver for Mediatek SoC MT8173. 2016-05-06 17:47:35 +02:00
mtk_drm_gem.c dma-mapping: use unsigned long for dma_attrs 2016-08-04 08:50:07 -04:00
mtk_drm_gem.h dma-mapping: use unsigned long for dma_attrs 2016-08-04 08:50:07 -04:00
mtk_drm_plane.c drm/mediatek: plane: Use FB's format's cpp to compute x offset 2016-08-08 14:20:02 -04:00
mtk_drm_plane.h drm/mediatek: Remove mtk_drm_plane 2016-08-08 14:20:00 -04:00
mtk_dsi.c drm: mediatek: Rely on the default ->best_encoder() behavior 2016-06-09 08:43:26 +02:00
mtk_hdmi_ddc.c drm/mediatek: Add HDMI support 2016-06-16 16:30:38 +02:00
mtk_hdmi_regs.h drm/mediatek: enable hdmi output control bit 2016-06-16 16:30:38 +02:00
mtk_hdmi.c drm/mediatek: do mtk_hdmi_send_infoframe after HDMI clock enable 2016-10-19 09:06:41 +08:00
mtk_hdmi.h drm/mediatek: Add HDMI support 2016-06-16 16:30:38 +02:00
mtk_mipi_tx.c drm/mediatek/mtk_mipi_tx: checking the wrong variable 2016-07-12 14:47:04 +02:00
mtk_mt8173_hdmi_phy.c drm/mediatek: enhance the HDMI driving current 2016-10-19 09:06:53 +08:00