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45d33aa5d7
Follow the recent trend for the license description, and also fix the wrongly stated X11 to MIT. As already pointed on the DT ML, the X11 license text [1] is explicitly for the X Consortium and has a couple of extra clauses. The MIT license text [2] is actually what the current DT files claim. [1] https://spdx.org/licenses/X11.html [2] https://spdx.org/licenses/MIT.html Cc: Chris Packham <chris.packham@alliedtelesis.co.nz> Acked-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
115 lines
2.3 KiB
Plaintext
115 lines
2.3 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Device Tree file for DB-DXBC2 board
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*
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* Copyright (C) 2016 Allied Telesis Labs
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*
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* Based on armada-xp-db.dts
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*
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* Note: this Device Tree assumes that the bootloader has remapped the
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* internal registers to 0xf1000000 (instead of the default
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* 0xd0000000). The 0xf1000000 is the default used by the recent,
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* DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
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* boards were delivered with an older version of the bootloader that
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* left internal registers mapped at 0xd0000000. If you are in this
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* situation, you should either update your bootloader (preferred
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* solution) or the below Device Tree should be adjusted.
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*/
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/dts-v1/;
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#include "armada-xp-98dx4251.dtsi"
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/ {
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model = "Marvell Bobcat2 Evaluation Board";
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compatible = "marvell,db-dxbc2", "marvell,armadaxp-98dx4251", "marvell,armada-370-xp";
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chosen {
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bootargs = "console=ttyS0,115200 earlyprintk";
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};
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memory {
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device_type = "memory";
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reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
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};
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};
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&devbus_bootcs {
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status = "okay";
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/* Device Bus parameters are required */
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/* Read parameters */
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devbus,bus-width = <16>;
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devbus,turn-off-ps = <60000>;
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devbus,badr-skew-ps = <0>;
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devbus,acc-first-ps = <124000>;
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devbus,acc-next-ps = <248000>;
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devbus,rd-setup-ps = <0>;
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devbus,rd-hold-ps = <0>;
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/* Write parameters */
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devbus,sync-enable = <0>;
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devbus,wr-high-ps = <60000>;
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devbus,wr-low-ps = <60000>;
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devbus,ale-wr-ps = <60000>;
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};
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&i2c0 {
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clock-frequency = <100000>;
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status = "okay";
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};
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&uart0 {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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&nand {
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status = "okay";
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num-cs = <1>;
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marvell,nand-keep-config;
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marvell,nand-enable-arbiter;
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nand-on-flash-bbt;
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nand-ecc-strength = <4>;
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nand-ecc-step-size = <512>;
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};
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&sdio {
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pinctrl-0 = <&sdio_pins>;
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pinctrl-names = "default";
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status = "okay";
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/* No CD or WP GPIOs */
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broken-cd;
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};
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&spi0 {
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status = "okay";
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spi-flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "m25p64";
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reg = <0>; /* Chip select 0 */
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spi-max-frequency = <20000000>;
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m25p,fast-read;
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partition@u-boot {
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reg = <0x00000000 0x00100000>;
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label = "u-boot";
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};
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partition@u-boot-env {
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reg = <0x00100000 0x00040000>;
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label = "u-boot-env";
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};
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partition@unused {
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reg = <0x00140000 0x00ec0000>;
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label = "unused";
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};
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};
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};
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