mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 10:21:24 +07:00
17f41571bb
In fd4363fff3
("x86: Introduce int3 (breakpoint)-based
instruction patching"), the mechanism that was introduced for
notifying alternatives code from int3 exception handler that and
exception occured was die_notifier.
This is however problematic, as early code might be using jump
labels even before the notifier registration has been performed,
which will then lead to an oops due to unhandled exception. One
of such occurences has been encountered by Fengguang:
int3: 0000 [#1] PREEMPT SMP DEBUG_PAGEALLOC
Modules linked in:
CPU: 1 PID: 0 Comm: swapper/1 Not tainted 3.11.0-rc1-01429-g04bf576 #8
task: ffff88000da1b040 ti: ffff88000da1c000 task.ti: ffff88000da1c000
RIP: 0010:[<ffffffff811098cc>] [<ffffffff811098cc>] ttwu_do_wakeup+0x28/0x225
RSP: 0000:ffff88000dd03f10 EFLAGS: 00000006
RAX: 0000000000000000 RBX: ffff88000dd12940 RCX: ffffffff81769c40
RDX: 0000000000000002 RSI: 0000000000000000 RDI: 0000000000000001
RBP: ffff88000dd03f28 R08: ffffffff8176a8c0 R09: 0000000000000002
R10: ffffffff810ff484 R11: ffff88000dd129e8 R12: ffff88000dbc90c0
R13: ffff88000dbc90c0 R14: ffff88000da1dfd8 R15: ffff88000da1dfd8
FS: 0000000000000000(0000) GS:ffff88000dd00000(0000) knlGS:0000000000000000
CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b
CR2: 00000000ffffffff CR3: 0000000001c88000 CR4: 00000000000006e0
Stack:
ffff88000dd12940 ffff88000dbc90c0 ffff88000da1dfd8 ffff88000dd03f48
ffffffff81109e2b ffff88000dd12940 0000000000000000 ffff88000dd03f68
ffffffff81109e9e 0000000000000000 0000000000012940 ffff88000dd03f98
Call Trace:
<IRQ>
[<ffffffff81109e2b>] ttwu_do_activate.constprop.56+0x6d/0x79
[<ffffffff81109e9e>] sched_ttwu_pending+0x67/0x84
[<ffffffff8110c845>] scheduler_ipi+0x15a/0x2b0
[<ffffffff8104dfb4>] smp_reschedule_interrupt+0x38/0x41
[<ffffffff8173bf5d>] reschedule_interrupt+0x6d/0x80
<EOI>
[<ffffffff810ff484>] ? __atomic_notifier_call_chain+0x5/0xc1
[<ffffffff8105cc30>] ? native_safe_halt+0xd/0x16
[<ffffffff81015f10>] default_idle+0x147/0x282
[<ffffffff81017026>] arch_cpu_idle+0x3d/0x5d
[<ffffffff81127d6a>] cpu_idle_loop+0x46d/0x5db
[<ffffffff81127f5c>] cpu_startup_entry+0x84/0x84
[<ffffffff8104f4f8>] start_secondary+0x3c8/0x3d5
[...]
Fix this by directly calling poke_int3_handler() from the int3
exception handler (analogically to what ftrace has been doing
already), instead of relying on notifier, registration of which
might not have yet been finalized by the time of the first trap.
Reported-and-tested-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Acked-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: H. Peter Anvin <hpa@linux.intel.com>
Cc: Fengguang Wu <fengguang.wu@intel.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Link: http://lkml.kernel.org/r/alpine.LNX.2.00.1307231007490.14024@pobox.suse.cz
Signed-off-by: Ingo Molnar <mingo@kernel.org>
800 lines
21 KiB
C
800 lines
21 KiB
C
/*
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* Copyright (C) 1991, 1992 Linus Torvalds
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* Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
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*
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* Pentium III FXSR, SSE support
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* Gareth Hughes <gareth@valinux.com>, May 2000
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*/
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/*
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* Handle hardware traps and faults.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/context_tracking.h>
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#include <linux/interrupt.h>
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#include <linux/kallsyms.h>
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#include <linux/spinlock.h>
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#include <linux/kprobes.h>
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#include <linux/uaccess.h>
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#include <linux/kdebug.h>
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#include <linux/kgdb.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/ptrace.h>
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#include <linux/string.h>
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/kexec.h>
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#include <linux/sched.h>
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#include <linux/timer.h>
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#include <linux/init.h>
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#include <linux/bug.h>
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#include <linux/nmi.h>
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#include <linux/mm.h>
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#include <linux/smp.h>
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#include <linux/io.h>
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#ifdef CONFIG_EISA
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#include <linux/ioport.h>
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#include <linux/eisa.h>
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#endif
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#if defined(CONFIG_EDAC)
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#include <linux/edac.h>
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#endif
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#include <asm/kmemcheck.h>
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#include <asm/stacktrace.h>
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#include <asm/processor.h>
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#include <asm/debugreg.h>
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#include <linux/atomic.h>
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#include <asm/ftrace.h>
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#include <asm/traps.h>
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#include <asm/desc.h>
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#include <asm/i387.h>
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#include <asm/fpu-internal.h>
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#include <asm/mce.h>
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#include <asm/fixmap.h>
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#include <asm/mach_traps.h>
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#include <asm/alternative.h>
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#ifdef CONFIG_X86_64
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#include <asm/x86_init.h>
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#include <asm/pgalloc.h>
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#include <asm/proto.h>
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/* No need to be aligned, but done to keep all IDTs defined the same way. */
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gate_desc debug_idt_table[NR_VECTORS] __page_aligned_bss;
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#else
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#include <asm/processor-flags.h>
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#include <asm/setup.h>
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asmlinkage int system_call(void);
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#endif
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/* Must be page-aligned because the real IDT is used in a fixmap. */
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gate_desc idt_table[NR_VECTORS] __page_aligned_bss;
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DECLARE_BITMAP(used_vectors, NR_VECTORS);
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EXPORT_SYMBOL_GPL(used_vectors);
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static inline void conditional_sti(struct pt_regs *regs)
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{
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if (regs->flags & X86_EFLAGS_IF)
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local_irq_enable();
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}
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static inline void preempt_conditional_sti(struct pt_regs *regs)
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{
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inc_preempt_count();
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if (regs->flags & X86_EFLAGS_IF)
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local_irq_enable();
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}
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static inline void conditional_cli(struct pt_regs *regs)
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{
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if (regs->flags & X86_EFLAGS_IF)
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local_irq_disable();
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}
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static inline void preempt_conditional_cli(struct pt_regs *regs)
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{
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if (regs->flags & X86_EFLAGS_IF)
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local_irq_disable();
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dec_preempt_count();
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}
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static int __kprobes
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do_trap_no_signal(struct task_struct *tsk, int trapnr, char *str,
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struct pt_regs *regs, long error_code)
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{
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#ifdef CONFIG_X86_32
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if (regs->flags & X86_VM_MASK) {
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/*
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* Traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
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* On nmi (interrupt 2), do_trap should not be called.
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*/
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if (trapnr < X86_TRAP_UD) {
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if (!handle_vm86_trap((struct kernel_vm86_regs *) regs,
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error_code, trapnr))
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return 0;
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}
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return -1;
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}
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#endif
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if (!user_mode(regs)) {
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if (!fixup_exception(regs)) {
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tsk->thread.error_code = error_code;
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tsk->thread.trap_nr = trapnr;
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die(str, regs, error_code);
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}
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return 0;
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}
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return -1;
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}
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static void __kprobes
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do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
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long error_code, siginfo_t *info)
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{
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struct task_struct *tsk = current;
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if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code))
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return;
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/*
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* We want error_code and trap_nr set for userspace faults and
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* kernelspace faults which result in die(), but not
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* kernelspace faults which are fixed up. die() gives the
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* process no chance to handle the signal and notice the
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* kernel fault information, so that won't result in polluting
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* the information about previously queued, but not yet
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* delivered, faults. See also do_general_protection below.
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*/
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tsk->thread.error_code = error_code;
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tsk->thread.trap_nr = trapnr;
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#ifdef CONFIG_X86_64
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if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
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printk_ratelimit()) {
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pr_info("%s[%d] trap %s ip:%lx sp:%lx error:%lx",
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tsk->comm, tsk->pid, str,
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regs->ip, regs->sp, error_code);
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print_vma_addr(" in ", regs->ip);
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pr_cont("\n");
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}
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#endif
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if (info)
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force_sig_info(signr, info, tsk);
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else
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force_sig(signr, tsk);
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}
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#define DO_ERROR(trapnr, signr, str, name) \
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dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
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{ \
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enum ctx_state prev_state; \
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\
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prev_state = exception_enter(); \
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if (notify_die(DIE_TRAP, str, regs, error_code, \
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trapnr, signr) == NOTIFY_STOP) { \
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exception_exit(prev_state); \
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return; \
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} \
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conditional_sti(regs); \
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do_trap(trapnr, signr, str, regs, error_code, NULL); \
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exception_exit(prev_state); \
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}
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#define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
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dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
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{ \
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siginfo_t info; \
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enum ctx_state prev_state; \
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\
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info.si_signo = signr; \
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info.si_errno = 0; \
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info.si_code = sicode; \
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info.si_addr = (void __user *)siaddr; \
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prev_state = exception_enter(); \
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if (notify_die(DIE_TRAP, str, regs, error_code, \
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trapnr, signr) == NOTIFY_STOP) { \
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exception_exit(prev_state); \
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return; \
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} \
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conditional_sti(regs); \
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do_trap(trapnr, signr, str, regs, error_code, &info); \
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exception_exit(prev_state); \
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}
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DO_ERROR_INFO(X86_TRAP_DE, SIGFPE, "divide error", divide_error, FPE_INTDIV,
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regs->ip)
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DO_ERROR(X86_TRAP_OF, SIGSEGV, "overflow", overflow)
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DO_ERROR(X86_TRAP_BR, SIGSEGV, "bounds", bounds)
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DO_ERROR_INFO(X86_TRAP_UD, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN,
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regs->ip)
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DO_ERROR(X86_TRAP_OLD_MF, SIGFPE, "coprocessor segment overrun",
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coprocessor_segment_overrun)
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DO_ERROR(X86_TRAP_TS, SIGSEGV, "invalid TSS", invalid_TSS)
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DO_ERROR(X86_TRAP_NP, SIGBUS, "segment not present", segment_not_present)
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#ifdef CONFIG_X86_32
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DO_ERROR(X86_TRAP_SS, SIGBUS, "stack segment", stack_segment)
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#endif
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DO_ERROR_INFO(X86_TRAP_AC, SIGBUS, "alignment check", alignment_check,
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BUS_ADRALN, 0)
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#ifdef CONFIG_X86_64
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/* Runs on IST stack */
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dotraplinkage void do_stack_segment(struct pt_regs *regs, long error_code)
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{
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enum ctx_state prev_state;
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prev_state = exception_enter();
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if (notify_die(DIE_TRAP, "stack segment", regs, error_code,
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X86_TRAP_SS, SIGBUS) != NOTIFY_STOP) {
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preempt_conditional_sti(regs);
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do_trap(X86_TRAP_SS, SIGBUS, "stack segment", regs, error_code, NULL);
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preempt_conditional_cli(regs);
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}
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exception_exit(prev_state);
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}
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dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
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{
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static const char str[] = "double fault";
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struct task_struct *tsk = current;
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exception_enter();
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/* Return not checked because double check cannot be ignored */
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notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV);
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tsk->thread.error_code = error_code;
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tsk->thread.trap_nr = X86_TRAP_DF;
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#ifdef CONFIG_DOUBLEFAULT
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df_debug(regs, error_code);
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#endif
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/*
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* This is always a kernel trap and never fixable (and thus must
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* never return).
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*/
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for (;;)
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die(str, regs, error_code);
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}
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#endif
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dotraplinkage void __kprobes
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do_general_protection(struct pt_regs *regs, long error_code)
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{
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struct task_struct *tsk;
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enum ctx_state prev_state;
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prev_state = exception_enter();
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conditional_sti(regs);
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#ifdef CONFIG_X86_32
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if (regs->flags & X86_VM_MASK) {
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local_irq_enable();
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handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
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goto exit;
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}
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#endif
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tsk = current;
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if (!user_mode(regs)) {
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if (fixup_exception(regs))
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goto exit;
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tsk->thread.error_code = error_code;
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tsk->thread.trap_nr = X86_TRAP_GP;
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if (notify_die(DIE_GPF, "general protection fault", regs, error_code,
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X86_TRAP_GP, SIGSEGV) != NOTIFY_STOP)
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die("general protection fault", regs, error_code);
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goto exit;
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}
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tsk->thread.error_code = error_code;
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tsk->thread.trap_nr = X86_TRAP_GP;
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if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
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printk_ratelimit()) {
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pr_info("%s[%d] general protection ip:%lx sp:%lx error:%lx",
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tsk->comm, task_pid_nr(tsk),
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regs->ip, regs->sp, error_code);
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print_vma_addr(" in ", regs->ip);
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pr_cont("\n");
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}
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force_sig(SIGSEGV, tsk);
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exit:
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exception_exit(prev_state);
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}
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/* May run on IST stack. */
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dotraplinkage void __kprobes notrace do_int3(struct pt_regs *regs, long error_code)
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{
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enum ctx_state prev_state;
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#ifdef CONFIG_DYNAMIC_FTRACE
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/*
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* ftrace must be first, everything else may cause a recursive crash.
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* See note by declaration of modifying_ftrace_code in ftrace.c
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*/
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if (unlikely(atomic_read(&modifying_ftrace_code)) &&
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ftrace_int3_handler(regs))
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return;
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#endif
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if (poke_int3_handler(regs))
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return;
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prev_state = exception_enter();
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#ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
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if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
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SIGTRAP) == NOTIFY_STOP)
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goto exit;
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#endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
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if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
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SIGTRAP) == NOTIFY_STOP)
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goto exit;
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/*
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* Let others (NMI) know that the debug stack is in use
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* as we may switch to the interrupt stack.
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*/
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debug_stack_usage_inc();
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preempt_conditional_sti(regs);
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do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL);
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preempt_conditional_cli(regs);
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debug_stack_usage_dec();
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exit:
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exception_exit(prev_state);
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}
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#ifdef CONFIG_X86_64
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/*
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* Help handler running on IST stack to switch back to user stack
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* for scheduling or signal handling. The actual stack switch is done in
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* entry.S
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*/
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asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *eregs)
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{
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struct pt_regs *regs = eregs;
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/* Did already sync */
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if (eregs == (struct pt_regs *)eregs->sp)
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;
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/* Exception from user space */
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else if (user_mode(eregs))
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regs = task_pt_regs(current);
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/*
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* Exception from kernel and interrupts are enabled. Move to
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* kernel process stack.
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*/
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else if (eregs->flags & X86_EFLAGS_IF)
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regs = (struct pt_regs *)(eregs->sp -= sizeof(struct pt_regs));
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if (eregs != regs)
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*regs = *eregs;
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return regs;
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}
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#endif
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/*
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* Our handling of the processor debug registers is non-trivial.
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* We do not clear them on entry and exit from the kernel. Therefore
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* it is possible to get a watchpoint trap here from inside the kernel.
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* However, the code in ./ptrace.c has ensured that the user can
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* only set watchpoints on userspace addresses. Therefore the in-kernel
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* watchpoint trap can only occur in code which is reading/writing
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* from user space. Such code must not hold kernel locks (since it
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* can equally take a page fault), therefore it is safe to call
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* force_sig_info even though that claims and releases locks.
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*
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* Code in ./signal.c ensures that the debug control register
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* is restored before we deliver any signal, and therefore that
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* user code runs with the correct debug control register even though
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* we clear it here.
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*
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* Being careful here means that we don't have to be as careful in a
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* lot of more complicated places (task switching can be a bit lazy
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* about restoring all the debug state, and ptrace doesn't have to
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* find every occurrence of the TF bit that could be saved away even
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* by user code)
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*
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* May run on IST stack.
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*/
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dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code)
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{
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struct task_struct *tsk = current;
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enum ctx_state prev_state;
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int user_icebp = 0;
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unsigned long dr6;
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int si_code;
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prev_state = exception_enter();
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get_debugreg(dr6, 6);
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|
|
/* Filter out all the reserved bits which are preset to 1 */
|
|
dr6 &= ~DR6_RESERVED;
|
|
|
|
/*
|
|
* If dr6 has no reason to give us about the origin of this trap,
|
|
* then it's very likely the result of an icebp/int01 trap.
|
|
* User wants a sigtrap for that.
|
|
*/
|
|
if (!dr6 && user_mode(regs))
|
|
user_icebp = 1;
|
|
|
|
/* Catch kmemcheck conditions first of all! */
|
|
if ((dr6 & DR_STEP) && kmemcheck_trap(regs))
|
|
goto exit;
|
|
|
|
/* DR6 may or may not be cleared by the CPU */
|
|
set_debugreg(0, 6);
|
|
|
|
/*
|
|
* The processor cleared BTF, so don't mark that we need it set.
|
|
*/
|
|
clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
|
|
|
|
/* Store the virtualized DR6 value */
|
|
tsk->thread.debugreg6 = dr6;
|
|
|
|
if (notify_die(DIE_DEBUG, "debug", regs, (long)&dr6, error_code,
|
|
SIGTRAP) == NOTIFY_STOP)
|
|
goto exit;
|
|
|
|
/*
|
|
* Let others (NMI) know that the debug stack is in use
|
|
* as we may switch to the interrupt stack.
|
|
*/
|
|
debug_stack_usage_inc();
|
|
|
|
/* It's safe to allow irq's after DR6 has been saved */
|
|
preempt_conditional_sti(regs);
|
|
|
|
if (regs->flags & X86_VM_MASK) {
|
|
handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code,
|
|
X86_TRAP_DB);
|
|
preempt_conditional_cli(regs);
|
|
debug_stack_usage_dec();
|
|
goto exit;
|
|
}
|
|
|
|
/*
|
|
* Single-stepping through system calls: ignore any exceptions in
|
|
* kernel space, but re-enable TF when returning to user mode.
|
|
*
|
|
* We already checked v86 mode above, so we can check for kernel mode
|
|
* by just checking the CPL of CS.
|
|
*/
|
|
if ((dr6 & DR_STEP) && !user_mode(regs)) {
|
|
tsk->thread.debugreg6 &= ~DR_STEP;
|
|
set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
|
|
regs->flags &= ~X86_EFLAGS_TF;
|
|
}
|
|
si_code = get_si_code(tsk->thread.debugreg6);
|
|
if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp)
|
|
send_sigtrap(tsk, regs, error_code, si_code);
|
|
preempt_conditional_cli(regs);
|
|
debug_stack_usage_dec();
|
|
|
|
exit:
|
|
exception_exit(prev_state);
|
|
}
|
|
|
|
/*
|
|
* Note that we play around with the 'TS' bit in an attempt to get
|
|
* the correct behaviour even in the presence of the asynchronous
|
|
* IRQ13 behaviour
|
|
*/
|
|
void math_error(struct pt_regs *regs, int error_code, int trapnr)
|
|
{
|
|
struct task_struct *task = current;
|
|
siginfo_t info;
|
|
unsigned short err;
|
|
char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" :
|
|
"simd exception";
|
|
|
|
if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP)
|
|
return;
|
|
conditional_sti(regs);
|
|
|
|
if (!user_mode_vm(regs))
|
|
{
|
|
if (!fixup_exception(regs)) {
|
|
task->thread.error_code = error_code;
|
|
task->thread.trap_nr = trapnr;
|
|
die(str, regs, error_code);
|
|
}
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* Save the info for the exception handler and clear the error.
|
|
*/
|
|
save_init_fpu(task);
|
|
task->thread.trap_nr = trapnr;
|
|
task->thread.error_code = error_code;
|
|
info.si_signo = SIGFPE;
|
|
info.si_errno = 0;
|
|
info.si_addr = (void __user *)regs->ip;
|
|
if (trapnr == X86_TRAP_MF) {
|
|
unsigned short cwd, swd;
|
|
/*
|
|
* (~cwd & swd) will mask out exceptions that are not set to unmasked
|
|
* status. 0x3f is the exception bits in these regs, 0x200 is the
|
|
* C1 reg you need in case of a stack fault, 0x040 is the stack
|
|
* fault bit. We should only be taking one exception at a time,
|
|
* so if this combination doesn't produce any single exception,
|
|
* then we have a bad program that isn't synchronizing its FPU usage
|
|
* and it will suffer the consequences since we won't be able to
|
|
* fully reproduce the context of the exception
|
|
*/
|
|
cwd = get_fpu_cwd(task);
|
|
swd = get_fpu_swd(task);
|
|
|
|
err = swd & ~cwd;
|
|
} else {
|
|
/*
|
|
* The SIMD FPU exceptions are handled a little differently, as there
|
|
* is only a single status/control register. Thus, to determine which
|
|
* unmasked exception was caught we must mask the exception mask bits
|
|
* at 0x1f80, and then use these to mask the exception bits at 0x3f.
|
|
*/
|
|
unsigned short mxcsr = get_fpu_mxcsr(task);
|
|
err = ~(mxcsr >> 7) & mxcsr;
|
|
}
|
|
|
|
if (err & 0x001) { /* Invalid op */
|
|
/*
|
|
* swd & 0x240 == 0x040: Stack Underflow
|
|
* swd & 0x240 == 0x240: Stack Overflow
|
|
* User must clear the SF bit (0x40) if set
|
|
*/
|
|
info.si_code = FPE_FLTINV;
|
|
} else if (err & 0x004) { /* Divide by Zero */
|
|
info.si_code = FPE_FLTDIV;
|
|
} else if (err & 0x008) { /* Overflow */
|
|
info.si_code = FPE_FLTOVF;
|
|
} else if (err & 0x012) { /* Denormal, Underflow */
|
|
info.si_code = FPE_FLTUND;
|
|
} else if (err & 0x020) { /* Precision */
|
|
info.si_code = FPE_FLTRES;
|
|
} else {
|
|
/*
|
|
* If we're using IRQ 13, or supposedly even some trap
|
|
* X86_TRAP_MF implementations, it's possible
|
|
* we get a spurious trap, which is not an error.
|
|
*/
|
|
return;
|
|
}
|
|
force_sig_info(SIGFPE, &info, task);
|
|
}
|
|
|
|
dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
|
|
{
|
|
enum ctx_state prev_state;
|
|
|
|
prev_state = exception_enter();
|
|
math_error(regs, error_code, X86_TRAP_MF);
|
|
exception_exit(prev_state);
|
|
}
|
|
|
|
dotraplinkage void
|
|
do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
|
|
{
|
|
enum ctx_state prev_state;
|
|
|
|
prev_state = exception_enter();
|
|
math_error(regs, error_code, X86_TRAP_XF);
|
|
exception_exit(prev_state);
|
|
}
|
|
|
|
dotraplinkage void
|
|
do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
|
|
{
|
|
conditional_sti(regs);
|
|
#if 0
|
|
/* No need to warn about this any longer. */
|
|
pr_info("Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
|
|
#endif
|
|
}
|
|
|
|
asmlinkage void __attribute__((weak)) smp_thermal_interrupt(void)
|
|
{
|
|
}
|
|
|
|
asmlinkage void __attribute__((weak)) smp_threshold_interrupt(void)
|
|
{
|
|
}
|
|
|
|
/*
|
|
* 'math_state_restore()' saves the current math information in the
|
|
* old math state array, and gets the new ones from the current task
|
|
*
|
|
* Careful.. There are problems with IBM-designed IRQ13 behaviour.
|
|
* Don't touch unless you *really* know how it works.
|
|
*
|
|
* Must be called with kernel preemption disabled (eg with local
|
|
* local interrupts as in the case of do_device_not_available).
|
|
*/
|
|
void math_state_restore(void)
|
|
{
|
|
struct task_struct *tsk = current;
|
|
|
|
if (!tsk_used_math(tsk)) {
|
|
local_irq_enable();
|
|
/*
|
|
* does a slab alloc which can sleep
|
|
*/
|
|
if (init_fpu(tsk)) {
|
|
/*
|
|
* ran out of memory!
|
|
*/
|
|
do_group_exit(SIGKILL);
|
|
return;
|
|
}
|
|
local_irq_disable();
|
|
}
|
|
|
|
__thread_fpu_begin(tsk);
|
|
|
|
/*
|
|
* Paranoid restore. send a SIGSEGV if we fail to restore the state.
|
|
*/
|
|
if (unlikely(restore_fpu_checking(tsk))) {
|
|
drop_init_fpu(tsk);
|
|
force_sig(SIGSEGV, tsk);
|
|
return;
|
|
}
|
|
|
|
tsk->fpu_counter++;
|
|
}
|
|
EXPORT_SYMBOL_GPL(math_state_restore);
|
|
|
|
dotraplinkage void __kprobes
|
|
do_device_not_available(struct pt_regs *regs, long error_code)
|
|
{
|
|
enum ctx_state prev_state;
|
|
|
|
prev_state = exception_enter();
|
|
BUG_ON(use_eager_fpu());
|
|
|
|
#ifdef CONFIG_MATH_EMULATION
|
|
if (read_cr0() & X86_CR0_EM) {
|
|
struct math_emu_info info = { };
|
|
|
|
conditional_sti(regs);
|
|
|
|
info.regs = regs;
|
|
math_emulate(&info);
|
|
exception_exit(prev_state);
|
|
return;
|
|
}
|
|
#endif
|
|
math_state_restore(); /* interrupts still off */
|
|
#ifdef CONFIG_X86_32
|
|
conditional_sti(regs);
|
|
#endif
|
|
exception_exit(prev_state);
|
|
}
|
|
|
|
#ifdef CONFIG_X86_32
|
|
dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
|
|
{
|
|
siginfo_t info;
|
|
enum ctx_state prev_state;
|
|
|
|
prev_state = exception_enter();
|
|
local_irq_enable();
|
|
|
|
info.si_signo = SIGILL;
|
|
info.si_errno = 0;
|
|
info.si_code = ILL_BADSTK;
|
|
info.si_addr = NULL;
|
|
if (notify_die(DIE_TRAP, "iret exception", regs, error_code,
|
|
X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) {
|
|
do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code,
|
|
&info);
|
|
}
|
|
exception_exit(prev_state);
|
|
}
|
|
#endif
|
|
|
|
/* Set of traps needed for early debugging. */
|
|
void __init early_trap_init(void)
|
|
{
|
|
set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK);
|
|
/* int3 can be called from all */
|
|
set_system_intr_gate_ist(X86_TRAP_BP, &int3, DEBUG_STACK);
|
|
#ifdef CONFIG_X86_32
|
|
set_intr_gate(X86_TRAP_PF, &page_fault);
|
|
#endif
|
|
load_idt(&idt_descr);
|
|
}
|
|
|
|
void __init early_trap_pf_init(void)
|
|
{
|
|
#ifdef CONFIG_X86_64
|
|
set_intr_gate(X86_TRAP_PF, &page_fault);
|
|
#endif
|
|
}
|
|
|
|
void __init trap_init(void)
|
|
{
|
|
int i;
|
|
|
|
#ifdef CONFIG_EISA
|
|
void __iomem *p = early_ioremap(0x0FFFD9, 4);
|
|
|
|
if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
|
|
EISA_bus = 1;
|
|
early_iounmap(p, 4);
|
|
#endif
|
|
|
|
set_intr_gate(X86_TRAP_DE, ÷_error);
|
|
set_intr_gate_ist(X86_TRAP_NMI, &nmi, NMI_STACK);
|
|
/* int4 can be called from all */
|
|
set_system_intr_gate(X86_TRAP_OF, &overflow);
|
|
set_intr_gate(X86_TRAP_BR, &bounds);
|
|
set_intr_gate(X86_TRAP_UD, &invalid_op);
|
|
set_intr_gate(X86_TRAP_NM, &device_not_available);
|
|
#ifdef CONFIG_X86_32
|
|
set_task_gate(X86_TRAP_DF, GDT_ENTRY_DOUBLEFAULT_TSS);
|
|
#else
|
|
set_intr_gate_ist(X86_TRAP_DF, &double_fault, DOUBLEFAULT_STACK);
|
|
#endif
|
|
set_intr_gate(X86_TRAP_OLD_MF, &coprocessor_segment_overrun);
|
|
set_intr_gate(X86_TRAP_TS, &invalid_TSS);
|
|
set_intr_gate(X86_TRAP_NP, &segment_not_present);
|
|
set_intr_gate_ist(X86_TRAP_SS, &stack_segment, STACKFAULT_STACK);
|
|
set_intr_gate(X86_TRAP_GP, &general_protection);
|
|
set_intr_gate(X86_TRAP_SPURIOUS, &spurious_interrupt_bug);
|
|
set_intr_gate(X86_TRAP_MF, &coprocessor_error);
|
|
set_intr_gate(X86_TRAP_AC, &alignment_check);
|
|
#ifdef CONFIG_X86_MCE
|
|
set_intr_gate_ist(X86_TRAP_MC, &machine_check, MCE_STACK);
|
|
#endif
|
|
set_intr_gate(X86_TRAP_XF, &simd_coprocessor_error);
|
|
|
|
/* Reserve all the builtin and the syscall vector: */
|
|
for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
|
|
set_bit(i, used_vectors);
|
|
|
|
#ifdef CONFIG_IA32_EMULATION
|
|
set_system_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall);
|
|
set_bit(IA32_SYSCALL_VECTOR, used_vectors);
|
|
#endif
|
|
|
|
#ifdef CONFIG_X86_32
|
|
set_system_trap_gate(SYSCALL_VECTOR, &system_call);
|
|
set_bit(SYSCALL_VECTOR, used_vectors);
|
|
#endif
|
|
|
|
/*
|
|
* Set the IDT descriptor to a fixed read-only location, so that the
|
|
* "sidt" instruction will not leak the location of the kernel, and
|
|
* to defend the IDT against arbitrary memory write vulnerabilities.
|
|
* It will be reloaded in cpu_init() */
|
|
__set_fixmap(FIX_RO_IDT, __pa_symbol(idt_table), PAGE_KERNEL_RO);
|
|
idt_descr.address = fix_to_virt(FIX_RO_IDT);
|
|
|
|
/*
|
|
* Should be a barrier for any external CPU state:
|
|
*/
|
|
cpu_init();
|
|
|
|
x86_init.irqs.trap_init();
|
|
|
|
#ifdef CONFIG_X86_64
|
|
memcpy(&debug_idt_table, &idt_table, IDT_ENTRIES * 16);
|
|
set_nmi_gate(X86_TRAP_DB, &debug);
|
|
set_nmi_gate(X86_TRAP_BP, &int3);
|
|
#endif
|
|
}
|