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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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0cecca9d03
While most of a task's FPU state is only needed in user space, the protection keys need to be in place immediately after a context switch. The reason is that any access to userspace memory while running in kernel mode also needs to abide by the memory permissions specified in the protection keys. The "eager switch" is a preparation for loading the FPU state on return to userland. Instead of decoupling PKRU state from xstate, update PKRU within xstate on write operations by the kernel. For user tasks the PKRU should be always read from the xsave area and it should not change anything because the PKRU value was loaded as part of FPU restore. For kernel threads the default "init_pkru_value" will be written. Before this commit, the kernel thread would end up with a random value which it inherited from the previous user task. [ bigeasy: save pkru to xstate, no cache, don't use __raw_xsave_addr() ] [ bp: update commit message, sort headers properly in asm/fpu/xstate.h ] Signed-off-by: Rik van Riel <riel@surriel.com> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Dave Hansen <dave.hansen@intel.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Cc: Andi Kleen <ak@linux.intel.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Aubrey Li <aubrey.li@intel.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jann Horn <jannh@google.com> Cc: "Jason A. Donenfeld" <Jason@zx2c4.com> Cc: Joerg Roedel <jroedel@suse.de> Cc: Juergen Gross <jgross@suse.com> Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> Cc: kvm ML <kvm@vger.kernel.org> Cc: Michal Hocko <mhocko@suse.cz> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Radim Krčmář <rkrcmar@redhat.com> Cc: x86-ml <x86@kernel.org> Link: https://lkml.kernel.org/r/20190403164156.19645-16-bigeasy@linutronix.de
63 lines
1.9 KiB
C
63 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_X86_XSAVE_H
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#define __ASM_X86_XSAVE_H
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#include <linux/uaccess.h>
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#include <linux/types.h>
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#include <asm/processor.h>
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#include <asm/user.h>
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/* Bit 63 of XCR0 is reserved for future expansion */
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#define XFEATURE_MASK_EXTEND (~(XFEATURE_MASK_FPSSE | (1ULL << 63)))
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#define XSTATE_CPUID 0x0000000d
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#define FXSAVE_SIZE 512
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#define XSAVE_HDR_SIZE 64
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#define XSAVE_HDR_OFFSET FXSAVE_SIZE
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#define XSAVE_YMM_SIZE 256
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#define XSAVE_YMM_OFFSET (XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET)
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/* Supervisor features */
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#define XFEATURE_MASK_SUPERVISOR (XFEATURE_MASK_PT)
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/* All currently supported features */
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#define XCNTXT_MASK (XFEATURE_MASK_FP | \
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XFEATURE_MASK_SSE | \
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XFEATURE_MASK_YMM | \
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XFEATURE_MASK_OPMASK | \
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XFEATURE_MASK_ZMM_Hi256 | \
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XFEATURE_MASK_Hi16_ZMM | \
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XFEATURE_MASK_PKRU | \
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XFEATURE_MASK_BNDREGS | \
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XFEATURE_MASK_BNDCSR)
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#ifdef CONFIG_X86_64
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#define REX_PREFIX "0x48, "
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#else
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#define REX_PREFIX
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#endif
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extern u64 xfeatures_mask;
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extern u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS];
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extern void __init update_regset_xstate_info(unsigned int size,
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u64 xstate_mask);
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void fpu__xstate_clear_all_cpu_caps(void);
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void *get_xsave_addr(struct xregs_state *xsave, int xfeature_nr);
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const void *get_xsave_field_ptr(int xfeature_nr);
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int using_compacted_format(void);
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int copy_xstate_to_kernel(void *kbuf, struct xregs_state *xsave, unsigned int offset, unsigned int size);
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int copy_xstate_to_user(void __user *ubuf, struct xregs_state *xsave, unsigned int offset, unsigned int size);
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int copy_kernel_to_xstate(struct xregs_state *xsave, const void *kbuf);
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int copy_user_to_xstate(struct xregs_state *xsave, const void __user *ubuf);
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/* Validate an xstate header supplied by userspace (ptrace or sigreturn) */
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extern int validate_xstate_header(const struct xstate_header *hdr);
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#endif
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