mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-01-18 06:27:02 +07:00
8186749621
core: - add user def flag to cmd line modes - dma_fence_wait added might_sleep - dma-fence lockdep annotations - indefinite fences are bad documentation - gem CMA functions used in more drivers - struct mutex removal - more drm_ debug macro usage - set/drop master api fixes - fix for drm/mm hole size comparison - drm/mm remove invalid entry optimization - optimise drm/mm hole handling - VRR debugfs added - uncompressed AFBC modifier support - multiple display id blocks in EDID - multiple driver sg handling fixes - __drm_atomic_helper_crtc_reset in all drivers - managed vram helpers ttm: - ttm_mem_reg handling cleanup - remove bo offset field - drop CMA memtype flag - drop mappable flag xilinx: - New Xilinx ZynqMP DisplayPort Subsystem driver nouveau: - add CRC support - start using NVIDIA published class header files - convert all push buffer emission to new macros - Proper push buffer space management for EVO/NVD channels. - firmware loading fixes - 2MiB system memory pages support on Pascal and newer vkms: - larget cursor support i915: - Rocketlake platform enablement - Early DG1 enablement - Numerous GEM refactorings - DP MST fixes - FBC, PSR, Cursor, Color, Gamma fixes - TGL, RKL, EHL workaround updates - TGL 8K display support fixes - SDVO/HDMI/DVI fixes amdgpu: - Initial support for Sienna Cichlid GPU - Initial support for Navy Flounder GPU - SI UVD/VCE support - expose rotation property - Add support for unique id on Arcturus - Enable runtime PM on vega10 boards that support BACO - Skip BAR resizing if the bios already did id - Major swSMU code cleanup - Fixes for DCN bandwidth calculations amdkfd: - Track SDMA usage per process - SMI events interface radeon: - Default to on chip GART for AGP boards on all arches - Runtime PM reference count fixes msm: - headers regenerated causing churn - a650/a640 display and GPU enablement - dpu dither support for 6bpc panels - dpu cursor fix - dsi/mdp5 enablement for sdm630/sdm636/sdm66 tegra: - video capture prep support - reflection support mediatek: - convert mtk_dsi to bridge API meson: - FBC support sun4i: - iommu support rockchip: - register locking fix - per-pixel alpha support PX30 VOP - mgag200: - ported to simple and shmem helpers - device init cleanups - use managed pci functions - dropped hw cursor support ast: - use managed pci functions - use managed VRAM helpers - rework cursor support malidp: - dev_groups support hibmc: - refactor hibmc_drv_vdac: vc4: - create TXP CRTC imx: - error path fixes and cleanups etnaviv: - clock handling and error handling cleanups - use pin_user_pages -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJfK1atAAoJEAx081l5xIa+vDkQAJvl/mjbEA7fDy8Ysa0cgPLI 8nI4Bo/MaxkyRfUcP8+f/n3QQrRME37C0xa/Mn6SG1oFAdlovPwDqmDr5kjhkrMI geo8oJb2Q+AsrJr+ejpuF+iq0FxWi64bLbwJFJ2nBet+lHTMzoPceWeq3gG1Vvfl h6PV4B/9TjrnbhcKLIQSEmJ0kZp9uMkDBF/iynVn4+AKAkG1rQNjigdTH48IFPoz 28KuqG0B4NWu648zYXhjsN0kD3Dxjv3YOH+FsoWQpQa9icCTySYbySsQ7l0/XvA3 4BPtP3rWMhU46FHTBkWF72WQR4F0B4wm5DJJKMeG4vb1mXakOqAKcAq7JAbka+wL PBIiU+AcAKRSiwHmYDuDWtDoSpvYncuo0p3IvNP5hhih+7hqCnLIULDWS+V8AUzW 39usS/DXsVKk/HGYIYC89cRwsqWYD4c7edzOBdPQxW4LNYCD2gXezLJ5TeeR2lih y9JIVnPiluWleOovs4W3BoZNRuLc1rHBO6COToXjlme/48Z+sRHBAoge6UZurqRN jr+e60cS7n/DOeJQuNf4UHZnK48Pc24+3kVfMHlX+OKn8VuKPGr+USkeHV/NYL/B USiKCAxkkZM0dxerSb1/Ra9kGnchf0QBpA6Fsem8kV61Z4GVc+K6xJWg7KXB6n/3 7ZyalUKLwlOCz9sYsCCe =Yvtd -----END PGP SIGNATURE----- Merge tag 'drm-next-2020-08-06' of git://anongit.freedesktop.org/drm/drm Pull drm updates from Dave Airlie: "New xilinx displayport driver, AMD support for two new GPUs (more header files), i915 initial support for RocketLake and some work on their DG1 (discrete chip). The core also grew some lockdep annotations to try and constrain what drivers do with dma-fences, and added some documentation on why the idea of indefinite fences doesn't work. The long list is below. I do have some fixes trees outstanding, but I'll follow up with those later. core: - add user def flag to cmd line modes - dma_fence_wait added might_sleep - dma-fence lockdep annotations - indefinite fences are bad documentation - gem CMA functions used in more drivers - struct mutex removal - more drm_ debug macro usage - set/drop master api fixes - fix for drm/mm hole size comparison - drm/mm remove invalid entry optimization - optimise drm/mm hole handling - VRR debugfs added - uncompressed AFBC modifier support - multiple display id blocks in EDID - multiple driver sg handling fixes - __drm_atomic_helper_crtc_reset in all drivers - managed vram helpers ttm: - ttm_mem_reg handling cleanup - remove bo offset field - drop CMA memtype flag - drop mappable flag xilinx: - New Xilinx ZynqMP DisplayPort Subsystem driver nouveau: - add CRC support - start using NVIDIA published class header files - convert all push buffer emission to new macros - Proper push buffer space management for EVO/NVD channels. - firmware loading fixes - 2MiB system memory pages support on Pascal and newer vkms: - larger cursor support i915: - Rocketlake platform enablement - Early DG1 enablement - Numerous GEM refactorings - DP MST fixes - FBC, PSR, Cursor, Color, Gamma fixes - TGL, RKL, EHL workaround updates - TGL 8K display support fixes - SDVO/HDMI/DVI fixes amdgpu: - Initial support for Sienna Cichlid GPU - Initial support for Navy Flounder GPU - SI UVD/VCE support - expose rotation property - Add support for unique id on Arcturus - Enable runtime PM on vega10 boards that support BACO - Skip BAR resizing if the bios already did id - Major swSMU code cleanup - Fixes for DCN bandwidth calculations amdkfd: - Track SDMA usage per process - SMI events interface radeon: - Default to on chip GART for AGP boards on all arches - Runtime PM reference count fixes msm: - headers regenerated causing churn - a650/a640 display and GPU enablement - dpu dither support for 6bpc panels - dpu cursor fix - dsi/mdp5 enablement for sdm630/sdm636/sdm66 tegra: - video capture prep support - reflection support mediatek: - convert mtk_dsi to bridge API meson: - FBC support sun4i: - iommu support rockchip: - register locking fix - per-pixel alpha support PX30 VOP mgag200: - ported to simple and shmem helpers - device init cleanups - use managed pci functions - dropped hw cursor support ast: - use managed pci functions - use managed VRAM helpers - rework cursor support malidp: - dev_groups support hibmc: - refactor hibmc_drv_vdac: vc4: - create TXP CRTC imx: - error path fixes and cleanups etnaviv: - clock handling and error handling cleanups - use pin_user_pages" * tag 'drm-next-2020-08-06' of git://anongit.freedesktop.org/drm/drm: (1747 commits) drm/msm: use kthread_create_worker instead of kthread_run drm/msm/mdp5: Add MDP5 configuration for SDM636/660 drm/msm/dsi: Add DSI configuration for SDM660 drm/msm/mdp5: Add MDP5 configuration for SDM630 drm/msm/dsi: Add phy configuration for SDM630/636/660 drm/msm/a6xx: add A640/A650 hwcg drm/msm/a6xx: hwcg tables in gpulist drm/msm/dpu: add SM8250 to hw catalog drm/msm/dpu: add SM8150 to hw catalog drm/msm/dpu: intf timing path for displayport drm/msm/dpu: set missing flush bits for INTF_2 and INTF_3 drm/msm/dpu: don't use INTF_INPUT_CTRL feature on sdm845 drm/msm/dpu: move some sspp caps to dpu_caps drm/msm/dpu: update UBWC config for sm8150 and sm8250 drm/msm/dpu: use right setup_blend_config for sm8150 and sm8250 drm/msm/a6xx: set ubwc config for A640 and A650 drm/msm/adreno: un-open-code some packets drm/msm: sync generated headers drm/msm/a6xx: add build_bw_table for A640/A650 drm/msm/a6xx: fix crashstate capture for A650 ...
806 lines
21 KiB
C
806 lines
21 KiB
C
/*
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* Copyright (C) 2008 Maarten Maathuis.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include <acpi/video.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_fb_helper.h>
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#include <drm/drm_fourcc.h>
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#include <drm/drm_gem_framebuffer_helper.h>
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#include <drm/drm_probe_helper.h>
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#include <drm/drm_vblank.h>
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#include "nouveau_fbcon.h"
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#include "nouveau_crtc.h"
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#include "nouveau_gem.h"
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#include "nouveau_connector.h"
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#include "nv50_display.h"
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#include <nvif/class.h>
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#include <nvif/cl0046.h>
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#include <nvif/event.h>
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#include <dispnv50/crc.h>
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int
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nouveau_display_vblank_enable(struct drm_crtc *crtc)
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{
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struct nouveau_crtc *nv_crtc;
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nv_crtc = nouveau_crtc(crtc);
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nvif_notify_get(&nv_crtc->vblank);
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return 0;
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}
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void
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nouveau_display_vblank_disable(struct drm_crtc *crtc)
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{
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struct nouveau_crtc *nv_crtc;
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nv_crtc = nouveau_crtc(crtc);
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nvif_notify_put(&nv_crtc->vblank);
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}
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static inline int
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calc(int blanks, int blanke, int total, int line)
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{
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if (blanke >= blanks) {
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if (line >= blanks)
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line -= total;
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} else {
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if (line >= blanks)
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line -= total;
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line -= blanke + 1;
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}
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return line;
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}
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static bool
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nouveau_display_scanoutpos_head(struct drm_crtc *crtc, int *vpos, int *hpos,
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ktime_t *stime, ktime_t *etime)
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{
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struct {
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struct nv04_disp_mthd_v0 base;
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struct nv04_disp_scanoutpos_v0 scan;
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} args = {
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.base.method = NV04_DISP_SCANOUTPOS,
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.base.head = nouveau_crtc(crtc)->index,
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};
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struct nouveau_display *disp = nouveau_display(crtc->dev);
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struct drm_vblank_crtc *vblank = &crtc->dev->vblank[drm_crtc_index(crtc)];
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int retry = 20;
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bool ret = false;
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do {
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ret = nvif_mthd(&disp->disp.object, 0, &args, sizeof(args));
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if (ret != 0)
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return false;
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if (args.scan.vline) {
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ret = true;
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break;
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}
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if (retry) ndelay(vblank->linedur_ns);
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} while (retry--);
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*hpos = args.scan.hline;
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*vpos = calc(args.scan.vblanks, args.scan.vblanke,
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args.scan.vtotal, args.scan.vline);
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if (stime) *stime = ns_to_ktime(args.scan.time[0]);
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if (etime) *etime = ns_to_ktime(args.scan.time[1]);
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return ret;
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}
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bool
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nouveau_display_scanoutpos(struct drm_crtc *crtc,
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bool in_vblank_irq, int *vpos, int *hpos,
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ktime_t *stime, ktime_t *etime,
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const struct drm_display_mode *mode)
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{
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return nouveau_display_scanoutpos_head(crtc, vpos, hpos,
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stime, etime);
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}
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static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
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.destroy = drm_gem_fb_destroy,
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.create_handle = drm_gem_fb_create_handle,
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};
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static void
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nouveau_decode_mod(struct nouveau_drm *drm,
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uint64_t modifier,
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uint32_t *tile_mode,
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uint8_t *kind)
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{
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struct nouveau_display *disp = nouveau_display(drm->dev);
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BUG_ON(!tile_mode || !kind);
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if (modifier == DRM_FORMAT_MOD_LINEAR) {
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/* tile_mode will not be used in this case */
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*tile_mode = 0;
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*kind = 0;
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} else {
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/*
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* Extract the block height and kind from the corresponding
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* modifier fields. See drm_fourcc.h for details.
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*/
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if ((modifier & (0xffull << 12)) == 0ull) {
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/* Legacy modifier. Translate to this dev's 'kind.' */
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modifier |= disp->format_modifiers[0] & (0xffull << 12);
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}
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*tile_mode = (uint32_t)(modifier & 0xF);
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*kind = (uint8_t)((modifier >> 12) & 0xFF);
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if (drm->client.device.info.chipset >= 0xc0)
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*tile_mode <<= 4;
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}
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}
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void
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nouveau_framebuffer_get_layout(struct drm_framebuffer *fb,
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uint32_t *tile_mode,
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uint8_t *kind)
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{
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if (fb->flags & DRM_MODE_FB_MODIFIERS) {
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struct nouveau_drm *drm = nouveau_drm(fb->dev);
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nouveau_decode_mod(drm, fb->modifier, tile_mode, kind);
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} else {
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const struct nouveau_bo *nvbo = nouveau_gem_object(fb->obj[0]);
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*tile_mode = nvbo->mode;
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*kind = nvbo->kind;
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}
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}
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static const u64 legacy_modifiers[] = {
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DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(0),
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DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(1),
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DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(2),
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DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(3),
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DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(4),
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DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(5),
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DRM_FORMAT_MOD_INVALID
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};
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static int
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nouveau_validate_decode_mod(struct nouveau_drm *drm,
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uint64_t modifier,
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uint32_t *tile_mode,
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uint8_t *kind)
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{
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struct nouveau_display *disp = nouveau_display(drm->dev);
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int mod;
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if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) {
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return -EINVAL;
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}
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BUG_ON(!disp->format_modifiers);
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for (mod = 0;
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(disp->format_modifiers[mod] != DRM_FORMAT_MOD_INVALID) &&
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(disp->format_modifiers[mod] != modifier);
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mod++);
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if (disp->format_modifiers[mod] == DRM_FORMAT_MOD_INVALID) {
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for (mod = 0;
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(legacy_modifiers[mod] != DRM_FORMAT_MOD_INVALID) &&
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(legacy_modifiers[mod] != modifier);
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mod++);
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if (legacy_modifiers[mod] == DRM_FORMAT_MOD_INVALID)
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return -EINVAL;
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}
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nouveau_decode_mod(drm, modifier, tile_mode, kind);
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return 0;
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}
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static inline uint32_t
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nouveau_get_width_in_blocks(uint32_t stride)
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{
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/* GOBs per block in the x direction is always one, and GOBs are
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* 64 bytes wide
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*/
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static const uint32_t log_block_width = 6;
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return (stride + (1 << log_block_width) - 1) >> log_block_width;
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}
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static inline uint32_t
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nouveau_get_height_in_blocks(struct nouveau_drm *drm,
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uint32_t height,
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uint32_t log_block_height_in_gobs)
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{
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uint32_t log_gob_height;
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uint32_t log_block_height;
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BUG_ON(drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA);
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if (drm->client.device.info.family < NV_DEVICE_INFO_V0_FERMI)
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log_gob_height = 2;
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else
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log_gob_height = 3;
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log_block_height = log_block_height_in_gobs + log_gob_height;
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return (height + (1 << log_block_height) - 1) >> log_block_height;
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}
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static int
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nouveau_check_bl_size(struct nouveau_drm *drm, struct nouveau_bo *nvbo,
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uint32_t offset, uint32_t stride, uint32_t h,
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uint32_t tile_mode)
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{
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uint32_t gob_size, bw, bh;
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uint64_t bl_size;
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BUG_ON(drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA);
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if (drm->client.device.info.chipset >= 0xc0) {
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if (tile_mode & 0xF)
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return -EINVAL;
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tile_mode >>= 4;
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}
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if (tile_mode & 0xFFFFFFF0)
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return -EINVAL;
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if (drm->client.device.info.family < NV_DEVICE_INFO_V0_FERMI)
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gob_size = 256;
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else
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gob_size = 512;
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bw = nouveau_get_width_in_blocks(stride);
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bh = nouveau_get_height_in_blocks(drm, h, tile_mode);
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bl_size = bw * bh * (1 << tile_mode) * gob_size;
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DRM_DEBUG_KMS("offset=%u stride=%u h=%u tile_mode=0x%02x bw=%u bh=%u gob_size=%u bl_size=%llu size=%lu\n",
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offset, stride, h, tile_mode, bw, bh, gob_size, bl_size,
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nvbo->bo.mem.size);
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if (bl_size + offset > nvbo->bo.mem.size)
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return -ERANGE;
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return 0;
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}
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int
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nouveau_framebuffer_new(struct drm_device *dev,
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const struct drm_mode_fb_cmd2 *mode_cmd,
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struct drm_gem_object *gem,
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struct drm_framebuffer **pfb)
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{
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struct nouveau_drm *drm = nouveau_drm(dev);
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struct nouveau_bo *nvbo = nouveau_gem_object(gem);
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struct drm_framebuffer *fb;
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const struct drm_format_info *info;
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unsigned int width, height, i;
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uint32_t tile_mode;
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uint8_t kind;
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int ret;
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/* YUV overlays have special requirements pre-NV50 */
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if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA &&
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(mode_cmd->pixel_format == DRM_FORMAT_YUYV ||
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mode_cmd->pixel_format == DRM_FORMAT_UYVY ||
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mode_cmd->pixel_format == DRM_FORMAT_NV12 ||
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mode_cmd->pixel_format == DRM_FORMAT_NV21) &&
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(mode_cmd->pitches[0] & 0x3f || /* align 64 */
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mode_cmd->pitches[0] >= 0x10000 || /* at most 64k pitch */
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(mode_cmd->pitches[1] && /* pitches for planes must match */
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mode_cmd->pitches[0] != mode_cmd->pitches[1]))) {
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struct drm_format_name_buf format_name;
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DRM_DEBUG_KMS("Unsuitable framebuffer: format: %s; pitches: 0x%x\n 0x%x\n",
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drm_get_format_name(mode_cmd->pixel_format,
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&format_name),
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mode_cmd->pitches[0],
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mode_cmd->pitches[1]);
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return -EINVAL;
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}
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if (mode_cmd->flags & DRM_MODE_FB_MODIFIERS) {
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if (nouveau_validate_decode_mod(drm, mode_cmd->modifier[0],
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&tile_mode, &kind)) {
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DRM_DEBUG_KMS("Unsupported modifier: 0x%llx\n",
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mode_cmd->modifier[0]);
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return -EINVAL;
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}
|
|
} else {
|
|
tile_mode = nvbo->mode;
|
|
kind = nvbo->kind;
|
|
}
|
|
|
|
info = drm_get_format_info(dev, mode_cmd);
|
|
|
|
for (i = 0; i < info->num_planes; i++) {
|
|
width = drm_format_info_plane_width(info,
|
|
mode_cmd->width,
|
|
i);
|
|
height = drm_format_info_plane_height(info,
|
|
mode_cmd->height,
|
|
i);
|
|
|
|
if (kind) {
|
|
ret = nouveau_check_bl_size(drm, nvbo,
|
|
mode_cmd->offsets[i],
|
|
mode_cmd->pitches[i],
|
|
height, tile_mode);
|
|
if (ret)
|
|
return ret;
|
|
} else {
|
|
uint32_t size = mode_cmd->pitches[i] * height;
|
|
|
|
if (size + mode_cmd->offsets[i] > nvbo->bo.mem.size)
|
|
return -ERANGE;
|
|
}
|
|
}
|
|
|
|
if (!(fb = *pfb = kzalloc(sizeof(*fb), GFP_KERNEL)))
|
|
return -ENOMEM;
|
|
|
|
drm_helper_mode_fill_fb_struct(dev, fb, mode_cmd);
|
|
fb->obj[0] = gem;
|
|
|
|
ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs);
|
|
if (ret)
|
|
kfree(fb);
|
|
return ret;
|
|
}
|
|
|
|
struct drm_framebuffer *
|
|
nouveau_user_framebuffer_create(struct drm_device *dev,
|
|
struct drm_file *file_priv,
|
|
const struct drm_mode_fb_cmd2 *mode_cmd)
|
|
{
|
|
struct drm_framebuffer *fb;
|
|
struct drm_gem_object *gem;
|
|
int ret;
|
|
|
|
gem = drm_gem_object_lookup(file_priv, mode_cmd->handles[0]);
|
|
if (!gem)
|
|
return ERR_PTR(-ENOENT);
|
|
|
|
ret = nouveau_framebuffer_new(dev, mode_cmd, gem, &fb);
|
|
if (ret == 0)
|
|
return fb;
|
|
|
|
drm_gem_object_put(gem);
|
|
return ERR_PTR(ret);
|
|
}
|
|
|
|
static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
|
|
.fb_create = nouveau_user_framebuffer_create,
|
|
.output_poll_changed = nouveau_fbcon_output_poll_changed,
|
|
};
|
|
|
|
|
|
struct nouveau_drm_prop_enum_list {
|
|
u8 gen_mask;
|
|
int type;
|
|
char *name;
|
|
};
|
|
|
|
static struct nouveau_drm_prop_enum_list underscan[] = {
|
|
{ 6, UNDERSCAN_AUTO, "auto" },
|
|
{ 6, UNDERSCAN_OFF, "off" },
|
|
{ 6, UNDERSCAN_ON, "on" },
|
|
{}
|
|
};
|
|
|
|
static struct nouveau_drm_prop_enum_list dither_mode[] = {
|
|
{ 7, DITHERING_MODE_AUTO, "auto" },
|
|
{ 7, DITHERING_MODE_OFF, "off" },
|
|
{ 1, DITHERING_MODE_ON, "on" },
|
|
{ 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
|
|
{ 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
|
|
{ 4, DITHERING_MODE_TEMPORAL, "temporal" },
|
|
{}
|
|
};
|
|
|
|
static struct nouveau_drm_prop_enum_list dither_depth[] = {
|
|
{ 6, DITHERING_DEPTH_AUTO, "auto" },
|
|
{ 6, DITHERING_DEPTH_6BPC, "6 bpc" },
|
|
{ 6, DITHERING_DEPTH_8BPC, "8 bpc" },
|
|
{}
|
|
};
|
|
|
|
#define PROP_ENUM(p,gen,n,list) do { \
|
|
struct nouveau_drm_prop_enum_list *l = (list); \
|
|
int c = 0; \
|
|
while (l->gen_mask) { \
|
|
if (l->gen_mask & (1 << (gen))) \
|
|
c++; \
|
|
l++; \
|
|
} \
|
|
if (c) { \
|
|
p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \
|
|
l = (list); \
|
|
while (p && l->gen_mask) { \
|
|
if (l->gen_mask & (1 << (gen))) { \
|
|
drm_property_add_enum(p, l->type, l->name); \
|
|
} \
|
|
l++; \
|
|
} \
|
|
} \
|
|
} while(0)
|
|
|
|
static void
|
|
nouveau_display_hpd_work(struct work_struct *work)
|
|
{
|
|
struct nouveau_drm *drm = container_of(work, typeof(*drm), hpd_work);
|
|
|
|
pm_runtime_get_sync(drm->dev->dev);
|
|
|
|
drm_helper_hpd_irq_event(drm->dev);
|
|
|
|
pm_runtime_mark_last_busy(drm->dev->dev);
|
|
pm_runtime_put_sync(drm->dev->dev);
|
|
}
|
|
|
|
#ifdef CONFIG_ACPI
|
|
|
|
static int
|
|
nouveau_display_acpi_ntfy(struct notifier_block *nb, unsigned long val,
|
|
void *data)
|
|
{
|
|
struct nouveau_drm *drm = container_of(nb, typeof(*drm), acpi_nb);
|
|
struct acpi_bus_event *info = data;
|
|
int ret;
|
|
|
|
if (!strcmp(info->device_class, ACPI_VIDEO_CLASS)) {
|
|
if (info->type == ACPI_VIDEO_NOTIFY_PROBE) {
|
|
ret = pm_runtime_get(drm->dev->dev);
|
|
if (ret == 1 || ret == -EACCES) {
|
|
/* If the GPU is already awake, or in a state
|
|
* where we can't wake it up, it can handle
|
|
* it's own hotplug events.
|
|
*/
|
|
pm_runtime_put_autosuspend(drm->dev->dev);
|
|
} else if (ret == 0) {
|
|
/* This may be the only indication we receive
|
|
* of a connector hotplug on a runtime
|
|
* suspended GPU, schedule hpd_work to check.
|
|
*/
|
|
NV_DEBUG(drm, "ACPI requested connector reprobe\n");
|
|
schedule_work(&drm->hpd_work);
|
|
pm_runtime_put_noidle(drm->dev->dev);
|
|
} else {
|
|
NV_WARN(drm, "Dropped ACPI reprobe event due to RPM error: %d\n",
|
|
ret);
|
|
}
|
|
|
|
/* acpi-video should not generate keypresses for this */
|
|
return NOTIFY_BAD;
|
|
}
|
|
}
|
|
|
|
return NOTIFY_DONE;
|
|
}
|
|
#endif
|
|
|
|
int
|
|
nouveau_display_init(struct drm_device *dev, bool resume, bool runtime)
|
|
{
|
|
struct nouveau_display *disp = nouveau_display(dev);
|
|
struct drm_connector *connector;
|
|
struct drm_connector_list_iter conn_iter;
|
|
int ret;
|
|
|
|
/*
|
|
* Enable hotplug interrupts (done as early as possible, since we need
|
|
* them for MST)
|
|
*/
|
|
drm_connector_list_iter_begin(dev, &conn_iter);
|
|
nouveau_for_each_non_mst_connector_iter(connector, &conn_iter) {
|
|
struct nouveau_connector *conn = nouveau_connector(connector);
|
|
nvif_notify_get(&conn->hpd);
|
|
}
|
|
drm_connector_list_iter_end(&conn_iter);
|
|
|
|
ret = disp->init(dev, resume, runtime);
|
|
if (ret)
|
|
return ret;
|
|
|
|
/* enable connector detection and polling for connectors without HPD
|
|
* support
|
|
*/
|
|
drm_kms_helper_poll_enable(dev);
|
|
|
|
return ret;
|
|
}
|
|
|
|
void
|
|
nouveau_display_fini(struct drm_device *dev, bool suspend, bool runtime)
|
|
{
|
|
struct nouveau_display *disp = nouveau_display(dev);
|
|
struct nouveau_drm *drm = nouveau_drm(dev);
|
|
struct drm_connector *connector;
|
|
struct drm_connector_list_iter conn_iter;
|
|
|
|
if (!suspend) {
|
|
if (drm_drv_uses_atomic_modeset(dev))
|
|
drm_atomic_helper_shutdown(dev);
|
|
else
|
|
drm_helper_force_disable_all(dev);
|
|
}
|
|
|
|
/* disable hotplug interrupts */
|
|
drm_connector_list_iter_begin(dev, &conn_iter);
|
|
nouveau_for_each_non_mst_connector_iter(connector, &conn_iter) {
|
|
struct nouveau_connector *conn = nouveau_connector(connector);
|
|
nvif_notify_put(&conn->hpd);
|
|
}
|
|
drm_connector_list_iter_end(&conn_iter);
|
|
|
|
if (!runtime)
|
|
cancel_work_sync(&drm->hpd_work);
|
|
|
|
drm_kms_helper_poll_disable(dev);
|
|
disp->fini(dev, suspend);
|
|
}
|
|
|
|
static void
|
|
nouveau_display_create_properties(struct drm_device *dev)
|
|
{
|
|
struct nouveau_display *disp = nouveau_display(dev);
|
|
int gen;
|
|
|
|
if (disp->disp.object.oclass < NV50_DISP)
|
|
gen = 0;
|
|
else
|
|
if (disp->disp.object.oclass < GF110_DISP)
|
|
gen = 1;
|
|
else
|
|
gen = 2;
|
|
|
|
PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
|
|
PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
|
|
PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);
|
|
|
|
disp->underscan_hborder_property =
|
|
drm_property_create_range(dev, 0, "underscan hborder", 0, 128);
|
|
|
|
disp->underscan_vborder_property =
|
|
drm_property_create_range(dev, 0, "underscan vborder", 0, 128);
|
|
|
|
if (gen < 1)
|
|
return;
|
|
|
|
/* -90..+90 */
|
|
disp->vibrant_hue_property =
|
|
drm_property_create_range(dev, 0, "vibrant hue", 0, 180);
|
|
|
|
/* -100..+100 */
|
|
disp->color_vibrance_property =
|
|
drm_property_create_range(dev, 0, "color vibrance", 0, 200);
|
|
}
|
|
|
|
int
|
|
nouveau_display_create(struct drm_device *dev)
|
|
{
|
|
struct nouveau_drm *drm = nouveau_drm(dev);
|
|
struct nvkm_device *device = nvxx_device(&drm->client.device);
|
|
struct nouveau_display *disp;
|
|
int ret;
|
|
|
|
disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL);
|
|
if (!disp)
|
|
return -ENOMEM;
|
|
|
|
drm_mode_config_init(dev);
|
|
drm_mode_create_scaling_mode_property(dev);
|
|
drm_mode_create_dvi_i_properties(dev);
|
|
|
|
dev->mode_config.funcs = &nouveau_mode_config_funcs;
|
|
dev->mode_config.fb_base = device->func->resource_addr(device, 1);
|
|
|
|
dev->mode_config.min_width = 0;
|
|
dev->mode_config.min_height = 0;
|
|
if (drm->client.device.info.family < NV_DEVICE_INFO_V0_CELSIUS) {
|
|
dev->mode_config.max_width = 2048;
|
|
dev->mode_config.max_height = 2048;
|
|
} else
|
|
if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) {
|
|
dev->mode_config.max_width = 4096;
|
|
dev->mode_config.max_height = 4096;
|
|
} else
|
|
if (drm->client.device.info.family < NV_DEVICE_INFO_V0_FERMI) {
|
|
dev->mode_config.max_width = 8192;
|
|
dev->mode_config.max_height = 8192;
|
|
} else {
|
|
dev->mode_config.max_width = 16384;
|
|
dev->mode_config.max_height = 16384;
|
|
}
|
|
|
|
dev->mode_config.preferred_depth = 24;
|
|
dev->mode_config.prefer_shadow = 1;
|
|
dev->mode_config.allow_fb_modifiers = true;
|
|
|
|
if (drm->client.device.info.chipset < 0x11)
|
|
dev->mode_config.async_page_flip = false;
|
|
else
|
|
dev->mode_config.async_page_flip = true;
|
|
|
|
drm_kms_helper_poll_init(dev);
|
|
drm_kms_helper_poll_disable(dev);
|
|
|
|
if (nouveau_modeset != 2 && drm->vbios.dcb.entries) {
|
|
ret = nvif_disp_ctor(&drm->client.device, "kmsDisp", 0,
|
|
&disp->disp);
|
|
if (ret == 0) {
|
|
nouveau_display_create_properties(dev);
|
|
if (disp->disp.object.oclass < NV50_DISP)
|
|
ret = nv04_display_create(dev);
|
|
else
|
|
ret = nv50_display_create(dev);
|
|
}
|
|
} else {
|
|
ret = 0;
|
|
}
|
|
|
|
if (ret)
|
|
goto disp_create_err;
|
|
|
|
drm_mode_config_reset(dev);
|
|
|
|
if (dev->mode_config.num_crtc) {
|
|
ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
|
|
if (ret)
|
|
goto vblank_err;
|
|
|
|
if (disp->disp.object.oclass >= NV50_DISP)
|
|
nv50_crc_init(dev);
|
|
}
|
|
|
|
INIT_WORK(&drm->hpd_work, nouveau_display_hpd_work);
|
|
#ifdef CONFIG_ACPI
|
|
drm->acpi_nb.notifier_call = nouveau_display_acpi_ntfy;
|
|
register_acpi_notifier(&drm->acpi_nb);
|
|
#endif
|
|
|
|
return 0;
|
|
|
|
vblank_err:
|
|
disp->dtor(dev);
|
|
disp_create_err:
|
|
drm_kms_helper_poll_fini(dev);
|
|
drm_mode_config_cleanup(dev);
|
|
return ret;
|
|
}
|
|
|
|
void
|
|
nouveau_display_destroy(struct drm_device *dev)
|
|
{
|
|
struct nouveau_display *disp = nouveau_display(dev);
|
|
|
|
#ifdef CONFIG_ACPI
|
|
unregister_acpi_notifier(&nouveau_drm(dev)->acpi_nb);
|
|
#endif
|
|
|
|
drm_kms_helper_poll_fini(dev);
|
|
drm_mode_config_cleanup(dev);
|
|
|
|
if (disp->dtor)
|
|
disp->dtor(dev);
|
|
|
|
nvif_disp_dtor(&disp->disp);
|
|
|
|
nouveau_drm(dev)->display = NULL;
|
|
kfree(disp);
|
|
}
|
|
|
|
int
|
|
nouveau_display_suspend(struct drm_device *dev, bool runtime)
|
|
{
|
|
struct nouveau_display *disp = nouveau_display(dev);
|
|
|
|
if (drm_drv_uses_atomic_modeset(dev)) {
|
|
if (!runtime) {
|
|
disp->suspend = drm_atomic_helper_suspend(dev);
|
|
if (IS_ERR(disp->suspend)) {
|
|
int ret = PTR_ERR(disp->suspend);
|
|
disp->suspend = NULL;
|
|
return ret;
|
|
}
|
|
}
|
|
}
|
|
|
|
nouveau_display_fini(dev, true, runtime);
|
|
return 0;
|
|
}
|
|
|
|
void
|
|
nouveau_display_resume(struct drm_device *dev, bool runtime)
|
|
{
|
|
struct nouveau_display *disp = nouveau_display(dev);
|
|
|
|
nouveau_display_init(dev, true, runtime);
|
|
|
|
if (drm_drv_uses_atomic_modeset(dev)) {
|
|
if (disp->suspend) {
|
|
drm_atomic_helper_resume(dev, disp->suspend);
|
|
disp->suspend = NULL;
|
|
}
|
|
return;
|
|
}
|
|
}
|
|
|
|
int
|
|
nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
|
|
struct drm_mode_create_dumb *args)
|
|
{
|
|
struct nouveau_cli *cli = nouveau_cli(file_priv);
|
|
struct nouveau_bo *bo;
|
|
uint32_t domain;
|
|
int ret;
|
|
|
|
args->pitch = roundup(args->width * (args->bpp / 8), 256);
|
|
args->size = args->pitch * args->height;
|
|
args->size = roundup(args->size, PAGE_SIZE);
|
|
|
|
/* Use VRAM if there is any ; otherwise fallback to system memory */
|
|
if (nouveau_drm(dev)->client.device.info.ram_size != 0)
|
|
domain = NOUVEAU_GEM_DOMAIN_VRAM;
|
|
else
|
|
domain = NOUVEAU_GEM_DOMAIN_GART;
|
|
|
|
ret = nouveau_gem_new(cli, args->size, 0, domain, 0, 0, &bo);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = drm_gem_handle_create(file_priv, &bo->bo.base, &args->handle);
|
|
drm_gem_object_put(&bo->bo.base);
|
|
return ret;
|
|
}
|
|
|
|
int
|
|
nouveau_display_dumb_map_offset(struct drm_file *file_priv,
|
|
struct drm_device *dev,
|
|
uint32_t handle, uint64_t *poffset)
|
|
{
|
|
struct drm_gem_object *gem;
|
|
|
|
gem = drm_gem_object_lookup(file_priv, handle);
|
|
if (gem) {
|
|
struct nouveau_bo *bo = nouveau_gem_object(gem);
|
|
*poffset = drm_vma_node_offset_addr(&bo->bo.base.vma_node);
|
|
drm_gem_object_put(gem);
|
|
return 0;
|
|
}
|
|
|
|
return -ENOENT;
|
|
}
|