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3be7db6ab4
When an associativity level change is found for one thread, the
siblings threads need to be updated as well. This is done today
for PRRN in stage_topology_update() but is missing for VPHN in
update_cpu_associativity_changes_mask(). This patch will correctly
update all thread siblings during a topology change.
Without this patch a topology update can result in a CPU in
init_sched_groups_power() getting stuck indefinitely in a loop.
This loop is built in build_sched_groups(). As a result of the thread
moving to a node separate from its siblings the struct sched_group will
have its next pointer set to point to itself rather than the sched_group
struct of the next thread. This happens because we have a domain without
the SD_OVERLAP flag, which is correct, and a topology that doesn't conform
with reality (threads on the same core assigned to different numa nodes).
When this list is traversed by init_sched_groups_power() it will reach
the thread's sched_group structure and loop indefinitely; the cpu will
be stuck at this point.
The bug was exposed when VPHN was enabled in commit b7abef0 (v3.9).
Cc: <stable@vger.kernel.org> [v3.9+]
Reported-by: Jan Stancek <jstancek@redhat.com>
Signed-off-by: Robert Jennings <rcj@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
213 lines
5.5 KiB
C
213 lines
5.5 KiB
C
/*
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* smp.h: PowerPC-specific SMP code.
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*
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* Original was a copy of sparc smp.h. Now heavily modified
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* for PPC.
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*
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* Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
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* Copyright (C) 1996-2001 Cort Dougan <cort@fsmlabs.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef _ASM_POWERPC_SMP_H
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#define _ASM_POWERPC_SMP_H
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#ifdef __KERNEL__
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#include <linux/threads.h>
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#include <linux/cpumask.h>
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#include <linux/kernel.h>
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#include <linux/irqreturn.h>
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#ifndef __ASSEMBLY__
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#ifdef CONFIG_PPC64
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#include <asm/paca.h>
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#endif
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#include <asm/percpu.h>
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extern int boot_cpuid;
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extern int spinning_secondaries;
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extern void cpu_die(void);
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#ifdef CONFIG_SMP
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struct smp_ops_t {
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void (*message_pass)(int cpu, int msg);
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#ifdef CONFIG_PPC_SMP_MUXED_IPI
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void (*cause_ipi)(int cpu, unsigned long data);
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#endif
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int (*probe)(void);
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int (*kick_cpu)(int nr);
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void (*setup_cpu)(int nr);
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void (*bringup_done)(void);
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void (*take_timebase)(void);
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void (*give_timebase)(void);
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int (*cpu_disable)(void);
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void (*cpu_die)(unsigned int nr);
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int (*cpu_bootable)(unsigned int nr);
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};
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extern void smp_send_debugger_break(void);
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extern void start_secondary_resume(void);
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extern void smp_generic_give_timebase(void);
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extern void smp_generic_take_timebase(void);
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DECLARE_PER_CPU(unsigned int, cpu_pvr);
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#ifdef CONFIG_HOTPLUG_CPU
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extern void migrate_irqs(void);
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int generic_cpu_disable(void);
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void generic_cpu_die(unsigned int cpu);
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void generic_mach_cpu_die(void);
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void generic_set_cpu_dead(unsigned int cpu);
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void generic_set_cpu_up(unsigned int cpu);
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int generic_check_cpu_restart(unsigned int cpu);
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extern void inhibit_secondary_onlining(void);
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extern void uninhibit_secondary_onlining(void);
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#else /* HOTPLUG_CPU */
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static inline void inhibit_secondary_onlining(void) {}
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static inline void uninhibit_secondary_onlining(void) {}
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#endif
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#ifdef CONFIG_PPC64
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#define raw_smp_processor_id() (local_paca->paca_index)
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#define hard_smp_processor_id() (get_paca()->hw_cpu_id)
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#else
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/* 32-bit */
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extern int smp_hw_index[];
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#define raw_smp_processor_id() (current_thread_info()->cpu)
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#define hard_smp_processor_id() (smp_hw_index[smp_processor_id()])
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static inline int get_hard_smp_processor_id(int cpu)
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{
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return smp_hw_index[cpu];
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}
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static inline void set_hard_smp_processor_id(int cpu, int phys)
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{
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smp_hw_index[cpu] = phys;
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}
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#endif
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DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map);
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DECLARE_PER_CPU(cpumask_var_t, cpu_core_map);
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static inline struct cpumask *cpu_sibling_mask(int cpu)
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{
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return per_cpu(cpu_sibling_map, cpu);
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}
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static inline struct cpumask *cpu_core_mask(int cpu)
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{
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return per_cpu(cpu_core_map, cpu);
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}
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extern int cpu_to_core_id(int cpu);
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/* Since OpenPIC has only 4 IPIs, we use slightly different message numbers.
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*
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* Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up
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* in /proc/interrupts will be wrong!!! --Troy */
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#define PPC_MSG_CALL_FUNCTION 0
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#define PPC_MSG_RESCHEDULE 1
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#define PPC_MSG_CALL_FUNC_SINGLE 2
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#define PPC_MSG_DEBUGGER_BREAK 3
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/* for irq controllers that have dedicated ipis per message (4) */
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extern int smp_request_message_ipi(int virq, int message);
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extern const char *smp_ipi_name[];
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/* for irq controllers with only a single ipi */
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extern void smp_muxed_ipi_set_data(int cpu, unsigned long data);
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extern void smp_muxed_ipi_message_pass(int cpu, int msg);
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extern irqreturn_t smp_ipi_demux(void);
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void smp_init_pSeries(void);
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void smp_init_cell(void);
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void smp_init_celleb(void);
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void smp_setup_cpu_maps(void);
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extern int __cpu_disable(void);
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extern void __cpu_die(unsigned int cpu);
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#else
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/* for UP */
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#define hard_smp_processor_id() get_hard_smp_processor_id(0)
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#define smp_setup_cpu_maps()
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static inline void inhibit_secondary_onlining(void) {}
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static inline void uninhibit_secondary_onlining(void) {}
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static inline const struct cpumask *cpu_sibling_mask(int cpu)
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{
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return cpumask_of(cpu);
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}
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#endif /* CONFIG_SMP */
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#ifdef CONFIG_PPC64
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static inline int get_hard_smp_processor_id(int cpu)
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{
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return paca[cpu].hw_cpu_id;
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}
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static inline void set_hard_smp_processor_id(int cpu, int phys)
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{
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paca[cpu].hw_cpu_id = phys;
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}
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extern void smp_release_cpus(void);
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#else
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/* 32-bit */
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#ifndef CONFIG_SMP
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extern int boot_cpuid_phys;
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static inline int get_hard_smp_processor_id(int cpu)
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{
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return boot_cpuid_phys;
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}
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static inline void set_hard_smp_processor_id(int cpu, int phys)
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{
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boot_cpuid_phys = phys;
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}
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#endif /* !CONFIG_SMP */
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#endif /* !CONFIG_PPC64 */
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extern int smt_enabled_at_boot;
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extern int smp_mpic_probe(void);
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extern void smp_mpic_setup_cpu(int cpu);
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extern int smp_generic_kick_cpu(int nr);
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extern void smp_generic_give_timebase(void);
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extern void smp_generic_take_timebase(void);
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extern struct smp_ops_t *smp_ops;
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extern void arch_send_call_function_single_ipi(int cpu);
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extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
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/* Definitions relative to the secondary CPU spin loop
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* and entry point. Not all of them exist on both 32 and
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* 64-bit but defining them all here doesn't harm
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*/
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extern void generic_secondary_smp_init(void);
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extern void generic_secondary_thread_init(void);
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extern unsigned long __secondary_hold_spinloop;
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extern unsigned long __secondary_hold_acknowledge;
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extern char __secondary_hold;
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extern void __early_start(void);
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#endif /* __ASSEMBLY__ */
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_SMP_H) */
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