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![Paul Burton](/assets/img/avatar_default.png)
Annotate cpu_wait implementations using the __cpuidle macro which places these functions in the .cpuidle.text section. This allows cpu_in_idle() to return true for PC values which fall within these functions, allowing nmi_backtrace() to produce cleaner output for CPUs running idle functions. For example: # echo l >/proc/sysrq-trigger [ 38.587170] sysrq: SysRq : Show backtrace of all active CPUs [ 38.593657] NMI backtrace for cpu 1 [ 38.597611] CPU: 1 PID: 161 Comm: sh Not tainted 4.18.0-rc1+ #27 [ 38.604306] Stack : 00000000 00000004 00000006 80486724 00000000 00000000 00000000 00000000 [ 38.613647] 80e17eda 00000034 00000000 00000000 80d20000 80b67e98 8e559c90 0ffe1e88 [ 38.622986] 00000000 00000000 80e70000 00000000 8f61db18 38312e34 722d302e 202b3163 [ 38.632324] 8e559d3c 8e559adc 00000001 6b636162 80d20000 80000000 00000000 80d1cfa4 [ 38.641664] 00000001 80d20000 80d19520 00000000 00000003 80836724 00000004 80e10004 [ 38.650993] ... [ 38.653724] Call Trace: [ 38.656499] [<8040cdd0>] show_stack+0xa0/0x144 [ 38.661475] [<80b67e98>] dump_stack+0xe8/0x120 [ 38.666455] [<80b6f6d4>] nmi_cpu_backtrace+0x1b4/0x1cc [ 38.672189] [<80b6f81c>] nmi_trigger_cpumask_backtrace+0x130/0x1e4 [ 38.679081] [<808295d8>] __handle_sysrq+0xc0/0x180 [ 38.684421] [<80829b84>] write_sysrq_trigger+0x50/0x64 [ 38.690176] [<8061c984>] proc_reg_write+0xd0/0xfc [ 38.695447] [<805aac1c>] __vfs_write+0x54/0x194 [ 38.700500] [<805aaf24>] vfs_write+0xe0/0x18c [ 38.705360] [<805ab190>] ksys_write+0x7c/0xf0 [ 38.710238] [<80416018>] syscall_common+0x34/0x58 [ 38.715558] Sending NMI from CPU 1 to CPUs 0,2-3: [ 38.720916] NMI backtrace for cpu 0 skipped: idling at r4k_wait_irqoff+0x2c/0x34 [ 38.729186] NMI backtrace for cpu 3 skipped: idling at r4k_wait_irqoff+0x2c/0x34 [ 38.737449] NMI backtrace for cpu 2 skipped: idling at r4k_wait_irqoff+0x2c/0x34 Without this we get register value & backtrace output from all CPUs, which is generally useless for those running the idle function & serves only to overwhelm & obfuscate the meaningful output from non-idle CPUs. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Huacai Chen <chenhc@lemote.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/19598/
137 lines
3.1 KiB
C
137 lines
3.1 KiB
C
/*
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* pmu.c, Power Management Unit routines for NEC VR4100 series.
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*
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* Copyright (C) 2003-2007 Yoichi Yuasa <yuasa@linux-mips.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/cpu.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/kernel.h>
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#include <linux/pm.h>
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#include <linux/sched.h>
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#include <linux/types.h>
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#include <asm/cacheflush.h>
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#include <asm/cpu.h>
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#include <asm/idle.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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#include <asm/reboot.h>
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#define PMU_TYPE1_BASE 0x0b0000a0UL
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#define PMU_TYPE1_SIZE 0x0eUL
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#define PMU_TYPE2_BASE 0x0f0000c0UL
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#define PMU_TYPE2_SIZE 0x10UL
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#define PMUCNT2REG 0x06
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#define SOFTRST 0x0010
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static void __iomem *pmu_base;
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#define pmu_read(offset) readw(pmu_base + (offset))
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#define pmu_write(offset, value) writew((value), pmu_base + (offset))
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static void __cpuidle vr41xx_cpu_wait(void)
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{
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local_irq_disable();
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if (!need_resched())
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/*
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* "standby" sets IE bit of the CP0_STATUS to 1.
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*/
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__asm__("standby;\n");
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else
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local_irq_enable();
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}
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static inline void software_reset(void)
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{
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uint16_t pmucnt2;
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switch (current_cpu_type()) {
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case CPU_VR4122:
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case CPU_VR4131:
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case CPU_VR4133:
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pmucnt2 = pmu_read(PMUCNT2REG);
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pmucnt2 |= SOFTRST;
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pmu_write(PMUCNT2REG, pmucnt2);
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break;
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default:
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set_c0_status(ST0_BEV | ST0_ERL);
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change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
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__flush_cache_all();
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write_c0_wired(0);
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__asm__("jr %0"::"r"(0xbfc00000));
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break;
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}
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}
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static void vr41xx_restart(char *command)
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{
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local_irq_disable();
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software_reset();
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while (1) ;
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}
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static void vr41xx_halt(void)
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{
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local_irq_disable();
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printk(KERN_NOTICE "\nYou can turn off the power supply\n");
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__asm__("hibernate;\n");
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}
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static int __init vr41xx_pmu_init(void)
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{
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unsigned long start, size;
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switch (current_cpu_type()) {
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case CPU_VR4111:
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case CPU_VR4121:
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start = PMU_TYPE1_BASE;
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size = PMU_TYPE1_SIZE;
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break;
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case CPU_VR4122:
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case CPU_VR4131:
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case CPU_VR4133:
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start = PMU_TYPE2_BASE;
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size = PMU_TYPE2_SIZE;
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break;
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default:
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printk("Unexpected CPU of NEC VR4100 series\n");
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return -ENODEV;
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}
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if (request_mem_region(start, size, "PMU") == NULL)
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return -EBUSY;
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pmu_base = ioremap(start, size);
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if (pmu_base == NULL) {
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release_mem_region(start, size);
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return -EBUSY;
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}
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cpu_wait = vr41xx_cpu_wait;
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_machine_restart = vr41xx_restart;
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_machine_halt = vr41xx_halt;
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pm_power_off = vr41xx_halt;
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return 0;
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}
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core_initcall(vr41xx_pmu_init);
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