Christoffer Dall 28232a4317 KVM: arm/arm64: Fix isues with GICv2 on GICv3 migration ... We have been a little loose with our intermediate VMCR representation where we had a 'ctlr' field, but we failed to differentiate between the GICv2 GICC_CTLR and ICC_CTLR_EL1 layouts, and therefore ended up mapping the wrong bits into the individual fields of the ICH_VMCR_EL2 when emulating a GICv2 on a GICv3 system. Fix this by using explicit fields for the VMCR bits instead. Cc: Eric Auger <eric.auger@redhat.com> Reported-by: wanghaibin <wanghaibin.wang@huawei.com> Signed-off-by: Christoffer Dall <cdall@linaro.org> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Tested-by: Marc Zyngier <marc.zyngier@arm.com>		2017-05-24 09:44:07 +02:00
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arm-gic-common.h	irqchip/gic-v3: Parse and export virtual GIC information	2016-05-03 12:54:21 +02:00
arm-gic-v3.h	KVM: arm/arm64: Fix isues with GICv2 on GICv3 migration	2017-05-24 09:44:07 +02:00
arm-gic.h	KVM: arm/arm64: Fix isues with GICv2 on GICv3 migration	2017-05-24 09:44:07 +02:00
arm-vic.h
chained_irq.h
ingenic.h	MIPS/IRQCHIP: Move Ingenic SoC intc driver to drivers/irqchip	2015-06-21 21:53:10 +02:00
irq-omap-intc.h
irq-partition-percpu.h	irqchip: Add per-cpu interrupt partitioning library	2016-05-02 13:42:51 +02:00
irq-sa11x0.h	ARM: 8367/1: sa1100: prepare for moving irq driver to drivers/irqchip	2015-05-28 14:40:03 +01:00
metag-ext.h
metag.h
mips-gic.h	Clocksource/mips-gic: Remove redundant non devicetree init	2017-04-20 14:56:59 +02:00
mmp.h
mxs.h
versatile-fpga.h
xtensa-mx.h
xtensa-pic.h