Evan Quan 0bcaefa6bf drm/amd/display: change the max clock level to 16 ... As the gfxclk for SMU11 can have at most 16 discrete levels. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-01-25 16:15:35 -05:00
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acp	drm/amdgpu: Remove wrapper layer of cgs irq handling	2018-03-21 14:36:58 -05:00
amdgpu	drm/amdgpu: add flags to emit_ib interface v2	2019-01-25 16:15:35 -05:00
amdkfd	drm/amdkfd: Don't assign dGPUs to APU topology devices	2019-01-14 15:37:33 -05:00
display	drm/amd/display: change the max clock level to 16	2019-01-25 16:15:35 -05:00
include	drm/amd/powerplay: support retrieving and adjusting dcefclock power levels V2	2019-01-25 16:15:34 -05:00
lib	drm/amdgpu: add license to Makefiles	2017-12-07 11:51:10 -05:00
powerplay	drm/amd/powerplay: run btc before enabling all SMU features	2019-01-25 16:15:35 -05:00