linux_dsm_epyc7002/arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi
Caesar Wang 68d19331af arm64: dts: rockchip: add ARM Mali GPU node for RK3399 SoCs
Add Mali GPU device tree node for the RK3399 SoCs, with devfreq
opp table.

RK3399 and RK3399-OP1 SoCs have a different recommendation table with
gpu opp. Also, the ARM's mali driver found on
https://developer.arm.com/products/software/mali-drivers/midgard-kernel.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-07-22 23:36:37 +02:00

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/*
* Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/ {
cluster0_opp: opp-table0 {
compatible = "operating-points-v2";
opp-shared;
opp00 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp01 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <825000>;
};
opp02 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <850000>;
};
opp03 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <900000>;
};
opp04 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <975000>;
};
opp05 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1100000>;
};
opp06 {
opp-hz = /bits/ 64 <1512000000>;
opp-microvolt = <1150000>;
};
};
cluster1_opp: opp-table1 {
compatible = "operating-points-v2";
opp-shared;
opp00 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp01 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <800000>;
};
opp02 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <825000>;
};
opp03 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <850000>;
};
opp04 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <900000>;
};
opp05 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <975000>;
};
opp06 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <1050000>;
};
opp07 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1150000>;
};
opp08 {
opp-hz = /bits/ 64 <2016000000>;
opp-microvolt = <1250000>;
};
};
gpu_opp_table: opp-table2 {
compatible = "operating-points-v2";
opp00 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <800000>;
};
opp01 {
opp-hz = /bits/ 64 <297000000>;
opp-microvolt = <800000>;
};
opp02 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <825000>;
};
opp03 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <850000>;
};
opp04 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <925000>;
};
opp05 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1075000>;
};
};
};
&cpu_l0 {
operating-points-v2 = <&cluster0_opp>;
};
&cpu_l1 {
operating-points-v2 = <&cluster0_opp>;
};
&cpu_l2 {
operating-points-v2 = <&cluster0_opp>;
};
&cpu_l3 {
operating-points-v2 = <&cluster0_opp>;
};
&cpu_b0 {
operating-points-v2 = <&cluster1_opp>;
};
&cpu_b1 {
operating-points-v2 = <&cluster1_opp>;
};
&gpu {
operating-points-v2 = <&gpu_opp_table>;
};