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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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0bbfdce345
fls returns bit positions starting from one for the lsb and the MCR register expects zero based (sub)slice addressing. Incorrent MCR programming can have the effect of directing MMIO reads of registers in the 0xb100-0xb3ff range to invalid subslice returning zeroes instead of actual content. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Fixes: |
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| .. | ||
| intel_breadcrumbs.c | ||
| intel_context_types.h | ||
| intel_context.c | ||
| intel_context.h | ||
| intel_engine_cs.c | ||
| intel_engine_pm.c | ||
| intel_engine_pm.h | ||
| intel_engine_types.h | ||
| intel_engine.h | ||
| intel_gpu_commands.h | ||
| intel_gt_pm.c | ||
| intel_gt_pm.h | ||
| intel_hangcheck.c | ||
| intel_lrc_reg.h | ||
| intel_lrc.c | ||
| intel_lrc.h | ||
| intel_mocs.c | ||
| intel_mocs.h | ||
| intel_reset.c | ||
| intel_reset.h | ||
| intel_ringbuffer.c | ||
| intel_sseu.c | ||
| intel_sseu.h | ||
| intel_workarounds_types.h | ||
| intel_workarounds.c | ||
| intel_workarounds.h | ||
| Makefile | ||
| Makefile.header-test | ||
| mock_engine.c | ||
| mock_engine.h | ||
| selftest_engine_cs.c | ||
| selftest_hangcheck.c | ||
| selftest_lrc.c | ||
| selftest_reset.c | ||
| selftest_workarounds.c | ||