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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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e37e0ee019
- turn dma_cache_sync into a dma_map_ops instance and remove
implementation that purely are dead because the architecture
doesn't support noncoherent allocations
- add a flag for busses that need DMA configuration (Robin Murphy)
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Merge tag 'dma-mapping-4.15' of git://git.infradead.org/users/hch/dma-mapping
Pull dma-mapping updates from Christoph Hellwig:
- turn dma_cache_sync into a dma_map_ops instance and remove
implementation that purely are dead because the architecture doesn't
support noncoherent allocations
- add a flag for busses that need DMA configuration (Robin Murphy)
* tag 'dma-mapping-4.15' of git://git.infradead.org/users/hch/dma-mapping:
dma-mapping: turn dma_cache_sync into a dma_map_ops method
sh: make dma_cache_sync a no-op
xtensa: make dma_cache_sync a no-op
unicore32: make dma_cache_sync a no-op
powerpc: make dma_cache_sync a no-op
mn10300: make dma_cache_sync a no-op
microblaze: make dma_cache_sync a no-op
ia64: make dma_cache_sync a no-op
frv: make dma_cache_sync a no-op
x86: make dma_cache_sync a no-op
floppy: consolidate the dummy fd_cacheflush definition
drivers: flag buses which demand DMA configuration
81 lines
2.4 KiB
C
81 lines
2.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _PARISC_DMA_MAPPING_H
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#define _PARISC_DMA_MAPPING_H
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#include <asm/cacheflush.h>
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/*
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** We need to support 4 different coherent dma models with one binary:
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**
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** I/O MMU consistent method dma_sync behavior
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** ============= ====================== =======================
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** a) PA-7x00LC uncachable host memory flush/purge
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** b) U2/Uturn cachable host memory NOP
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** c) Ike/Astro cachable host memory NOP
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** d) EPIC/SAGA memory on EPIC/SAGA flush/reset DMA channel
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**
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** PA-7[13]00LC processors have a GSC bus interface and no I/O MMU.
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**
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** Systems (eg PCX-T workstations) that don't fall into the above
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** categories will need to modify the needed drivers to perform
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** flush/purge and allocate "regular" cacheable pages for everything.
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*/
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#ifdef CONFIG_PA11
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extern const struct dma_map_ops pcxl_dma_ops;
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extern const struct dma_map_ops pcx_dma_ops;
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#endif
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extern const struct dma_map_ops *hppa_dma_ops;
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static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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{
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return hppa_dma_ops;
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}
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static inline void *
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parisc_walk_tree(struct device *dev)
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{
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struct device *otherdev;
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if(likely(dev->platform_data != NULL))
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return dev->platform_data;
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/* OK, just traverse the bus to find it */
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for(otherdev = dev->parent; otherdev;
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otherdev = otherdev->parent) {
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if(otherdev->platform_data) {
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dev->platform_data = otherdev->platform_data;
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break;
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}
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}
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return dev->platform_data;
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}
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#define GET_IOC(dev) ({ \
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void *__pdata = parisc_walk_tree(dev); \
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__pdata ? HBA_DATA(__pdata)->iommu : NULL; \
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})
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#ifdef CONFIG_IOMMU_CCIO
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struct parisc_device;
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struct ioc;
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void * ccio_get_iommu(const struct parisc_device *dev);
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int ccio_request_resource(const struct parisc_device *dev,
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struct resource *res);
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int ccio_allocate_resource(const struct parisc_device *dev,
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struct resource *res, unsigned long size,
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unsigned long min, unsigned long max, unsigned long align);
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#else /* !CONFIG_IOMMU_CCIO */
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#define ccio_get_iommu(dev) NULL
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#define ccio_request_resource(dev, res) insert_resource(&iomem_resource, res)
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#define ccio_allocate_resource(dev, res, size, min, max, align) \
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allocate_resource(&iomem_resource, res, size, min, max, \
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align, NULL, NULL)
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#endif /* !CONFIG_IOMMU_CCIO */
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#ifdef CONFIG_IOMMU_SBA
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struct parisc_device;
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void * sba_get_iommu(struct parisc_device *dev);
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#endif
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#endif
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