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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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0b7ac8e479
Modify the m68knommu/ColdFire core timer code to use register offsets with raw_read/raw_write access, instead of a mapped struct. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
136 lines
4.0 KiB
C
136 lines
4.0 KiB
C
/***************************************************************************/
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/*
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* timers.c -- generic ColdFire hardware timer support.
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*
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* Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com)
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*/
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/***************************************************************************/
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#include <linux/config.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/param.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/traps.h>
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#include <asm/machdep.h>
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#include <asm/coldfire.h>
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#include <asm/mcftimer.h>
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#include <asm/mcfsim.h>
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/***************************************************************************/
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/*
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* By default use timer1 as the system clock timer.
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*/
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#define TA(a) (MCF_MBAR + MCFTIMER_BASE1 + (a))
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/*
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* Default the timer and vector to use for ColdFire. Some ColdFire
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* CPU's and some boards may want different. Their sub-architecture
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* startup code (in config.c) can change these if they want.
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*/
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unsigned int mcf_timervector = 29;
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unsigned int mcf_profilevector = 31;
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unsigned int mcf_timerlevel = 5;
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/*
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* These provide the underlying interrupt vector support.
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* Unfortunately it is a little different on each ColdFire.
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*/
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extern void mcf_settimericr(int timer, int level);
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extern int mcf_timerirqpending(int timer);
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/***************************************************************************/
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void coldfire_tick(void)
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{
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/* Reset the ColdFire timer */
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__raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, TA(MCFTIMER_TER));
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}
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/***************************************************************************/
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void coldfire_timer_init(irqreturn_t (*handler)(int, void *, struct pt_regs *))
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{
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__raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR));
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__raw_writew(((MCF_BUSCLK / 16) / HZ), TA(MCFTIMER_TRR));
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__raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
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MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, TA(MCFTIMER_TMR));
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request_irq(mcf_timervector, handler, SA_INTERRUPT, "timer", NULL);
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mcf_settimericr(1, mcf_timerlevel);
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#ifdef CONFIG_HIGHPROFILE
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coldfire_profile_init();
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#endif
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}
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/***************************************************************************/
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unsigned long coldfire_timer_offset(void)
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{
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unsigned long trr, tcn, offset;
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tcn = __raw_readw(TA(MCFTIMER_TCN));
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trr = __raw_readw(TA(MCFTIMER_TRR));
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offset = (tcn * (1000000 / HZ)) / trr;
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/* Check if we just wrapped the counters and maybe missed a tick */
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if ((offset < (1000000 / HZ / 2)) && mcf_timerirqpending(1))
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offset += 1000000 / HZ;
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return offset;
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}
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/***************************************************************************/
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#ifdef CONFIG_HIGHPROFILE
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/***************************************************************************/
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/*
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* By default use timer2 as the profiler clock timer.
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*/
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#define PA(a) (MCF_MBAR + MCFTIMER_BASE2 + (a))
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/*
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* Choose a reasonably fast profile timer. Make it an odd value to
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* try and get good coverage of kernal operations.
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*/
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#define PROFILEHZ 1013
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/*
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* Use the other timer to provide high accuracy profiling info.
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*/
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void coldfire_profile_tick(int irq, void *dummy, struct pt_regs *regs)
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{
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/* Reset ColdFire timer2 */
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__raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, PA(MCFTIMER_TER));
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if (current->pid)
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profile_tick(CPU_PROFILING, regs);
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}
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/***************************************************************************/
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void coldfire_profile_init(void)
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{
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printk(KERN_INFO "PROFILE: lodging TIMER2 @ %dHz as profile timer\n", PROFILEHZ);
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/* Set up TIMER 2 as high speed profile clock */
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__raw_writew(MCFTIMER_TMR_DISABLE, PA(MCFTIMER_TMR));
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__raw_writew(((MCF_CLK / 16) / PROFILEHZ), PA(MCFTIMER_TRR));
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__raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
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MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, PA(MCFTIMER_TMR));
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request_irq(mcf_profilevector, coldfire_profile_tick,
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(SA_INTERRUPT | IRQ_FLG_FAST), "profile timer", NULL);
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mcf_settimericr(2, 7);
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}
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/***************************************************************************/
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#endif /* CONFIG_HIGHPROFILE */
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/***************************************************************************/
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