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457f218095
The current uaccess code uses a page table walk in some circumstances,
e.g. in case of the in atomic futex operations or if running on old
hardware which doesn't support the mvcos instruction.
However it turned out that the page table walk code does not correctly
lock page tables when accessing page table entries.
In other words: a different cpu may invalidate a page table entry while
the current cpu inspects the pte. This may lead to random data corruption.
Adding correct locking however isn't trivial for all uaccess operations.
Especially copy_in_user() is problematic since that requires to hold at
least two locks, but must be protected against ABBA deadlock when a
different cpu also performs a copy_in_user() operation.
So the solution is a different approach where we change address spaces:
User space runs in primary address mode, or access register mode within
vdso code, like it currently already does.
The kernel usually also runs in home space mode, however when accessing
user space the kernel switches to primary or secondary address mode if
the mvcos instruction is not available or if a compare-and-swap (futex)
instruction on a user space address is performed.
KVM however is special, since that requires the kernel to run in home
address space while implicitly accessing user space with the sie
instruction.
So we end up with:
User space:
- runs in primary or access register mode
- cr1 contains the user asce
- cr7 contains the user asce
- cr13 contains the kernel asce
Kernel space:
- runs in home space mode
- cr1 contains the user or kernel asce
-> the kernel asce is loaded when a uaccess requires primary or
secondary address mode
- cr7 contains the user or kernel asce, (changed with set_fs())
- cr13 contains the kernel asce
In case of uaccess the kernel changes to:
- primary space mode in case of a uaccess (copy_to_user) and uses
e.g. the mvcp instruction to access user space. However the kernel
will stay in home space mode if the mvcos instruction is available
- secondary space mode in case of futex atomic operations, so that the
instructions come from primary address space and data from secondary
space
In case of kvm the kernel runs in home space mode, but cr1 gets switched
to contain the gmap asce before the sie instruction gets executed. When
the sie instruction is finished cr1 will be switched back to contain the
user asce.
A context switch between two processes will always load the kernel asce
for the next process in cr1. So the first exit to user space is a bit
more expensive (one extra load control register instruction) than before,
however keeps the code rather simple.
In sum this means there is no need to perform any error prone page table
walks anymore when accessing user space.
The patch seems to be rather large, however it mainly removes the
the page table walk code and restores the previously deleted "standard"
uaccess code, with a couple of changes.
The uaccess without mvcos mode can be enforced with the "uaccess_primary"
kernel parameter.
Reported-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
120 lines
3.8 KiB
C
120 lines
3.8 KiB
C
/*
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* S390 version
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* Copyright IBM Corp. 2002, 2006
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* Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
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*/
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#ifndef _ASM_THREAD_INFO_H
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#define _ASM_THREAD_INFO_H
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/*
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* Size of kernel stack for each process
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*/
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#ifndef CONFIG_64BIT
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#define THREAD_ORDER 1
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#define ASYNC_ORDER 1
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#else /* CONFIG_64BIT */
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#define THREAD_ORDER 2
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#define ASYNC_ORDER 2
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#endif /* CONFIG_64BIT */
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#define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER)
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#define ASYNC_SIZE (PAGE_SIZE << ASYNC_ORDER)
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#ifndef __ASSEMBLY__
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#include <asm/lowcore.h>
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#include <asm/page.h>
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#include <asm/processor.h>
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/*
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* low level task data that entry.S needs immediate access to
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* - this struct should fit entirely inside of one cache line
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* - this struct shares the supervisor stack pages
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* - if the contents of this structure are changed, the assembly constants must also be changed
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*/
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struct thread_info {
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struct task_struct *task; /* main task structure */
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struct exec_domain *exec_domain; /* execution domain */
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unsigned long flags; /* low level flags */
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unsigned long sys_call_table; /* System call table address */
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unsigned int cpu; /* current CPU */
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int preempt_count; /* 0 => preemptable, <0 => BUG */
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struct restart_block restart_block;
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unsigned int system_call;
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__u64 user_timer;
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__u64 system_timer;
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unsigned long last_break; /* last breaking-event-address. */
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};
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/*
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* macros/functions for gaining access to the thread information structure
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*/
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#define INIT_THREAD_INFO(tsk) \
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{ \
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.task = &tsk, \
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.exec_domain = &default_exec_domain, \
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.flags = 0, \
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.cpu = 0, \
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.preempt_count = INIT_PREEMPT_COUNT, \
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.restart_block = { \
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.fn = do_no_restart_syscall, \
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}, \
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}
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#define init_thread_info (init_thread_union.thread_info)
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#define init_stack (init_thread_union.stack)
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/* how to get the thread information struct from C */
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static inline struct thread_info *current_thread_info(void)
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{
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return (struct thread_info *) S390_lowcore.thread_info;
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}
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#define THREAD_SIZE_ORDER THREAD_ORDER
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#endif
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/*
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* thread information flags bit numbers
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*/
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#define TIF_SYSCALL 0 /* inside a system call */
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#define TIF_NOTIFY_RESUME 1 /* callback before returning to user */
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#define TIF_SIGPENDING 2 /* signal pending */
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#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
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#define TIF_TLB_WAIT 4 /* wait for TLB flush completion */
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#define TIF_ASCE 5 /* primary asce needs fixup / uaccess */
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#define TIF_PER_TRAP 6 /* deliver sigtrap on return to user */
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#define TIF_MCCK_PENDING 7 /* machine check handling is pending */
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#define TIF_SYSCALL_TRACE 8 /* syscall trace active */
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#define TIF_SYSCALL_AUDIT 9 /* syscall auditing active */
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#define TIF_SECCOMP 10 /* secure computing */
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#define TIF_SYSCALL_TRACEPOINT 11 /* syscall tracepoint instrumentation */
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#define TIF_31BIT 17 /* 32bit process */
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#define TIF_MEMDIE 18 /* is terminating due to OOM killer */
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#define TIF_RESTORE_SIGMASK 19 /* restore signal mask in do_signal() */
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#define TIF_SINGLE_STEP 20 /* This task is single stepped */
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#define TIF_BLOCK_STEP 21 /* This task is block stepped */
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#define _TIF_SYSCALL (1<<TIF_SYSCALL)
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#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
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#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
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#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
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#define _TIF_TLB_WAIT (1<<TIF_TLB_WAIT)
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#define _TIF_ASCE (1<<TIF_ASCE)
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#define _TIF_PER_TRAP (1<<TIF_PER_TRAP)
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#define _TIF_MCCK_PENDING (1<<TIF_MCCK_PENDING)
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#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
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#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
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#define _TIF_SECCOMP (1<<TIF_SECCOMP)
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#define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT)
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#define _TIF_31BIT (1<<TIF_31BIT)
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#define _TIF_SINGLE_STEP (1<<TIF_SINGLE_STEP)
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#ifdef CONFIG_64BIT
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#define is_32bit_task() (test_thread_flag(TIF_31BIT))
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#else
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#define is_32bit_task() (1)
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#endif
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#endif /* _ASM_THREAD_INFO_H */
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