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fbbd7f1a51
The switch_to() macro has an optimization to avoid saving and
restoring register contents that aren't needed for kernel threads.
There is however the possibility that a kernel thread execve's a user
space program. In such a case the execve'd process can partially see
the contents of the previous process, which shouldn't be allowed.
To avoid this, simply always save and restore register contents on
context switch.
Cc: <stable@vger.kernel.org> # v2.6.37+
Fixes: fdb6d070ef ("switch_to: dont restore/save access & fpu regs for kernel threads")
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
50 lines
1.4 KiB
C
50 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright IBM Corp. 1999, 2009
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*
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* Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
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*/
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#ifndef __ASM_SWITCH_TO_H
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#define __ASM_SWITCH_TO_H
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#include <linux/thread_info.h>
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#include <asm/fpu/api.h>
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#include <asm/ptrace.h>
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#include <asm/guarded_storage.h>
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extern struct task_struct *__switch_to(void *, void *);
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extern void update_cr_regs(struct task_struct *task);
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static inline void save_access_regs(unsigned int *acrs)
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{
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typedef struct { int _[NUM_ACRS]; } acrstype;
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asm volatile("stam 0,15,%0" : "=Q" (*(acrstype *)acrs));
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}
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static inline void restore_access_regs(unsigned int *acrs)
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{
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typedef struct { int _[NUM_ACRS]; } acrstype;
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asm volatile("lam 0,15,%0" : : "Q" (*(acrstype *)acrs));
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}
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#define switch_to(prev, next, last) do { \
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/* save_fpu_regs() sets the CIF_FPU flag, which enforces \
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* a restore of the floating point / vector registers as \
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* soon as the next task returns to user space \
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*/ \
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save_fpu_regs(); \
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save_access_regs(&prev->thread.acrs[0]); \
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save_ri_cb(prev->thread.ri_cb); \
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save_gs_cb(prev->thread.gs_cb); \
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update_cr_regs(next); \
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restore_access_regs(&next->thread.acrs[0]); \
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restore_ri_cb(next->thread.ri_cb, prev->thread.ri_cb); \
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restore_gs_cb(next->thread.gs_cb); \
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prev = __switch_to(prev, next); \
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} while (0)
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#endif /* __ASM_SWITCH_TO_H */
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