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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
191 lines
4.6 KiB
C
191 lines
4.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* linux/arch/arm/mach-mmp/pxa910.c
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*
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* Code specific to PXA910
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*/
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#include <linux/clk/mmp.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/list.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/irqchip/mmp.h>
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#include <linux/platform_device.h>
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#include <asm/hardware/cache-tauros2.h>
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#include <asm/mach/time.h>
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#include "addr-map.h"
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#include "regs-apbc.h"
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#include "cputype.h"
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#include "irqs.h"
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#include "mfp.h"
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#include "devices.h"
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#include "pm-pxa910.h"
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#include "pxa910.h"
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#include "common.h"
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#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
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static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata =
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{
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MFP_ADDR_X(GPIO0, GPIO54, 0xdc),
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MFP_ADDR_X(GPIO67, GPIO98, 0x1b8),
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MFP_ADDR_X(GPIO100, GPIO109, 0x238),
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MFP_ADDR(GPIO123, 0xcc),
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MFP_ADDR(GPIO124, 0xd0),
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MFP_ADDR(DF_IO0, 0x40),
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MFP_ADDR(DF_IO1, 0x3c),
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MFP_ADDR(DF_IO2, 0x38),
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MFP_ADDR(DF_IO3, 0x34),
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MFP_ADDR(DF_IO4, 0x30),
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MFP_ADDR(DF_IO5, 0x2c),
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MFP_ADDR(DF_IO6, 0x28),
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MFP_ADDR(DF_IO7, 0x24),
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MFP_ADDR(DF_IO8, 0x20),
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MFP_ADDR(DF_IO9, 0x1c),
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MFP_ADDR(DF_IO10, 0x18),
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MFP_ADDR(DF_IO11, 0x14),
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MFP_ADDR(DF_IO12, 0x10),
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MFP_ADDR(DF_IO13, 0xc),
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MFP_ADDR(DF_IO14, 0x8),
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MFP_ADDR(DF_IO15, 0x4),
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MFP_ADDR(DF_nCS0_SM_nCS2, 0x44),
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MFP_ADDR(DF_nCS1_SM_nCS3, 0x48),
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MFP_ADDR(SM_nCS0, 0x4c),
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MFP_ADDR(SM_nCS1, 0x50),
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MFP_ADDR(DF_WEn, 0x54),
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MFP_ADDR(DF_REn, 0x58),
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MFP_ADDR(DF_CLE_SM_OEn, 0x5c),
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MFP_ADDR(DF_ALE_SM_WEn, 0x60),
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MFP_ADDR(SM_SCLK, 0x64),
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MFP_ADDR(DF_RDY0, 0x68),
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MFP_ADDR(SM_BE0, 0x6c),
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MFP_ADDR(SM_BE1, 0x70),
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MFP_ADDR(SM_ADV, 0x74),
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MFP_ADDR(DF_RDY1, 0x78),
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MFP_ADDR(SM_ADVMUX, 0x7c),
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MFP_ADDR(SM_RDY, 0x80),
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MFP_ADDR_X(MMC1_DAT7, MMC1_WP, 0x84),
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MFP_ADDR_END,
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};
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void __init pxa910_init_irq(void)
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{
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icu_init_irq();
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#ifdef CONFIG_PM
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icu_irq_chip.irq_set_wake = pxa910_set_wake;
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#endif
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}
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static int __init pxa910_init(void)
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{
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if (cpu_is_pxa910()) {
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#ifdef CONFIG_CACHE_TAUROS2
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tauros2_init(0);
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#endif
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mfp_init_base(MFPR_VIRT_BASE);
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mfp_init_addr(pxa910_mfp_addr_map);
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pxa910_clk_init(APB_PHYS_BASE + 0x50000,
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AXI_PHYS_BASE + 0x82800,
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APB_PHYS_BASE + 0x15000,
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APB_PHYS_BASE + 0x3b000);
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}
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return 0;
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}
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postcore_initcall(pxa910_init);
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/* system timer - clock enabled, 3.25MHz */
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#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
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#define APBC_TIMERS APBC_REG(0x34)
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void __init pxa910_timer_init(void)
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{
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/* reset and configure */
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__raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS);
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__raw_writel(TIMER_CLK_RST, APBC_TIMERS);
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mmp_timer_init(IRQ_PXA910_AP1_TIMER1, 3250000);
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}
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/* on-chip devices */
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/* NOTE: there are totally 3 UARTs on PXA910:
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*
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* UART1 - Slow UART (can be used both by AP and CP)
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* UART2/3 - Fast UART
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*
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* To be backward compatible with the legacy FFUART/BTUART/STUART sequence,
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* they are re-ordered as:
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*
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* pxa910_device_uart1 - UART2 as FFUART
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* pxa910_device_uart2 - UART3 as BTUART
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*
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* UART1 is not used by AP for the moment.
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*/
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PXA910_DEVICE(uart1, "pxa2xx-uart", 0, UART2, 0xd4017000, 0x30, 21, 22);
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PXA910_DEVICE(uart2, "pxa2xx-uart", 1, UART3, 0xd4018000, 0x30, 23, 24);
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PXA910_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28);
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PXA910_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28);
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PXA910_DEVICE(pwm1, "pxa910-pwm", 0, NONE, 0xd401a000, 0x10);
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PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10);
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PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10);
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PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10);
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PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
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PXA910_DEVICE(disp, "mmp-disp", 0, LCD, 0xd420b000, 0x1ec);
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PXA910_DEVICE(fb, "mmp-fb", -1, NONE, 0, 0);
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PXA910_DEVICE(panel, "tpo-hvga", -1, NONE, 0, 0);
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struct resource pxa910_resource_gpio[] = {
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{
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.start = 0xd4019000,
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.end = 0xd4019fff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_PXA910_AP_GPIO,
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.end = IRQ_PXA910_AP_GPIO,
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.name = "gpio_mux",
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device pxa910_device_gpio = {
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.name = "mmp-gpio",
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.id = -1,
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.num_resources = ARRAY_SIZE(pxa910_resource_gpio),
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.resource = pxa910_resource_gpio,
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};
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static struct resource pxa910_resource_rtc[] = {
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{
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.start = 0xd4010000,
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.end = 0xd401003f,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_PXA910_RTC_INT,
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.end = IRQ_PXA910_RTC_INT,
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.name = "rtc 1Hz",
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.flags = IORESOURCE_IRQ,
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}, {
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.start = IRQ_PXA910_RTC_ALARM,
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.end = IRQ_PXA910_RTC_ALARM,
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.name = "rtc alarm",
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device pxa910_device_rtc = {
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.name = "sa1100-rtc",
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.id = -1,
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.num_resources = ARRAY_SIZE(pxa910_resource_rtc),
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.resource = pxa910_resource_rtc,
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};
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