mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-22 19:03:28 +07:00
84ddfda6d4
There's a HP laptop out there where the MXM version in the VBIOS doesn't match what the ACPI implementation is expecting. These tables will accept 0x00 to MXMS to return latest version, but *only* if MXMI has been called first.. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
724 lines
18 KiB
C
724 lines
18 KiB
C
/*
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* Copyright 2011 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include <linux/acpi.h>
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#include "drmP.h"
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#include "nouveau_drv.h"
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#define MXM_DBG(dev, fmt, args...) NV_DEBUG((dev), "MXM: " fmt, ##args)
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#define MXM_MSG(dev, fmt, args...) NV_INFO((dev), "MXM: " fmt, ##args)
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static u8 *
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mxms_data(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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return dev_priv->mxms;
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}
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static u16
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mxms_version(struct drm_device *dev)
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{
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u8 *mxms = mxms_data(dev);
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u16 version = (mxms[4] << 8) | mxms[5];
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switch (version ) {
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case 0x0200:
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case 0x0201:
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case 0x0300:
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return version;
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default:
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break;
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}
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MXM_DBG(dev, "unknown version %d.%d\n", mxms[4], mxms[5]);
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return 0x0000;
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}
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static u16
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mxms_headerlen(struct drm_device *dev)
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{
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return 8;
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}
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static u16
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mxms_structlen(struct drm_device *dev)
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{
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return *(u16 *)&mxms_data(dev)[6];
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}
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static bool
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mxms_checksum(struct drm_device *dev)
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{
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u16 size = mxms_headerlen(dev) + mxms_structlen(dev);
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u8 *mxms = mxms_data(dev), sum = 0;
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while (size--)
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sum += *mxms++;
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if (sum) {
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MXM_DBG(dev, "checksum invalid\n");
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return false;
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}
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return true;
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}
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static bool
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mxms_valid(struct drm_device *dev)
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{
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u8 *mxms = mxms_data(dev);
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if (*(u32 *)mxms != 0x5f4d584d) {
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MXM_DBG(dev, "signature invalid\n");
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return false;
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}
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if (!mxms_version(dev) || !mxms_checksum(dev))
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return false;
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return true;
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}
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static bool
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mxms_foreach(struct drm_device *dev, u8 types,
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bool (*exec)(struct drm_device *, u8 *, void *), void *info)
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{
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u8 *mxms = mxms_data(dev);
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u8 *desc = mxms + mxms_headerlen(dev);
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u8 *fini = desc + mxms_structlen(dev) - 1;
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while (desc < fini) {
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u8 type = desc[0] & 0x0f;
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u8 headerlen = 0;
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u8 recordlen = 0;
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u8 entries = 0;
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switch (type) {
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case 0: /* Output Device Structure */
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if (mxms_version(dev) >= 0x0300)
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headerlen = 8;
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else
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headerlen = 6;
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break;
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case 1: /* System Cooling Capability Structure */
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case 2: /* Thermal Structure */
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case 3: /* Input Power Structure */
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headerlen = 4;
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break;
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case 4: /* GPIO Device Structure */
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headerlen = 4;
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recordlen = 2;
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entries = (ROM32(desc[0]) & 0x01f00000) >> 20;
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break;
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case 5: /* Vendor Specific Structure */
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headerlen = 8;
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break;
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case 6: /* Backlight Control Structure */
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if (mxms_version(dev) >= 0x0300) {
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headerlen = 4;
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recordlen = 8;
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entries = (desc[1] & 0xf0) >> 4;
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} else {
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headerlen = 8;
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}
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break;
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case 7: /* Fan Control Structure */
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headerlen = 8;
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recordlen = 4;
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entries = desc[1] & 0x07;
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break;
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default:
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MXM_DBG(dev, "unknown descriptor type %d\n", type);
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return false;
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}
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if ((drm_debug & DRM_UT_DRIVER) && (exec == NULL)) {
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static const char * mxms_desc_name[] = {
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"ODS", "SCCS", "TS", "IPS",
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"GSD", "VSS", "BCS", "FCS",
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};
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u8 *dump = desc;
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int i, j;
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MXM_DBG(dev, "%4s: ", mxms_desc_name[type]);
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for (j = headerlen - 1; j >= 0; j--)
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printk("%02x", dump[j]);
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printk("\n");
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dump += headerlen;
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for (i = 0; i < entries; i++, dump += recordlen) {
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MXM_DBG(dev, " ");
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for (j = recordlen - 1; j >= 0; j--)
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printk("%02x", dump[j]);
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printk("\n");
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}
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}
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if (types & (1 << type)) {
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if (!exec(dev, desc, info))
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return false;
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}
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desc += headerlen + (entries * recordlen);
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}
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return true;
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}
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static u8 *
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mxm_table(struct drm_device *dev, u8 *size)
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{
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struct bit_entry x;
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if (bit_table(dev, 'x', &x)) {
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MXM_DBG(dev, "BIT 'x' table not present\n");
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return NULL;
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}
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if (x.version != 1 || x.length < 3) {
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MXM_MSG(dev, "BIT x table %d/%d unknown\n",
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x.version, x.length);
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return NULL;
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}
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*size = x.length;
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return x.data;
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}
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/* These map MXM v2.x digital connection values to the appropriate SOR/link,
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* hopefully they're correct for all boards within the same chipset...
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*
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* MXM v3.x VBIOS are nicer and provide pointers to these tables.
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*/
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static u8 nv84_sor_map[16] = {
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0x00, 0x12, 0x22, 0x11, 0x32, 0x31, 0x11, 0x31,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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};
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static u8 nv92_sor_map[16] = {
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0x00, 0x12, 0x22, 0x11, 0x32, 0x31, 0x11, 0x31,
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0x11, 0x31, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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};
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static u8 nv94_sor_map[16] = {
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0x00, 0x14, 0x24, 0x11, 0x34, 0x31, 0x11, 0x31,
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0x11, 0x31, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00
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};
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static u8 nv96_sor_map[16] = {
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0x00, 0x14, 0x24, 0x00, 0x34, 0x00, 0x11, 0x31,
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0x11, 0x31, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00
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};
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static u8 nv98_sor_map[16] = {
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0x00, 0x14, 0x12, 0x11, 0x00, 0x31, 0x11, 0x31,
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0x11, 0x31, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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};
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static u8
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mxm_sor_map(struct drm_device *dev, u8 conn)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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u8 len, *mxm = mxm_table(dev, &len);
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if (mxm && len >= 6) {
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u8 *map = ROMPTR(dev, mxm[4]);
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if (map) {
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if (map[0] == 0x10) {
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if (conn < map[3])
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return map[map[1] + conn];
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return 0x00;
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}
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MXM_MSG(dev, "unknown sor map 0x%02x\n", map[0]);
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}
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}
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if (dev_priv->chipset == 0x84 || dev_priv->chipset == 0x86)
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return nv84_sor_map[conn];
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if (dev_priv->chipset == 0x92)
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return nv92_sor_map[conn];
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if (dev_priv->chipset == 0x94)
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return nv94_sor_map[conn];
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if (dev_priv->chipset == 0x96)
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return nv96_sor_map[conn];
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if (dev_priv->chipset == 0x98)
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return nv98_sor_map[conn];
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MXM_MSG(dev, "missing sor map\n");
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return 0x00;
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}
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static u8
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mxm_ddc_map(struct drm_device *dev, u8 port)
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{
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u8 len, *mxm = mxm_table(dev, &len);
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if (mxm && len >= 8) {
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u8 *map = ROMPTR(dev, mxm[6]);
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if (map) {
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if (map[0] == 0x10) {
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if (port < map[3])
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return map[map[1] + port];
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return 0x00;
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}
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MXM_MSG(dev, "unknown ddc map 0x%02x\n", map[0]);
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}
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}
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/* v2.x: directly write port as dcb i2cidx */
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return (port << 4) | port;
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}
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struct mxms_odev {
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u8 outp_type;
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u8 conn_type;
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u8 ddc_port;
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u8 dig_conn;
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};
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static void
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mxms_output_device(struct drm_device *dev, u8 *pdata, struct mxms_odev *desc)
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{
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u64 data = ROM32(pdata[0]);
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if (mxms_version(dev) >= 0x0300)
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data |= (u64)ROM16(pdata[4]) << 32;
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desc->outp_type = (data & 0x00000000000000f0ULL) >> 4;
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desc->ddc_port = (data & 0x0000000000000f00ULL) >> 8;
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desc->conn_type = (data & 0x000000000001f000ULL) >> 12;
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desc->dig_conn = (data & 0x0000000000780000ULL) >> 19;
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}
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struct context {
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u32 *outp;
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struct mxms_odev desc;
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};
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static bool
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mxm_match_tmds_partner(struct drm_device *dev, u8 *data, void *info)
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{
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struct context *ctx = info;
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struct mxms_odev desc;
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mxms_output_device(dev, data, &desc);
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if (desc.outp_type == 2 &&
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desc.dig_conn == ctx->desc.dig_conn)
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return false;
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return true;
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}
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static bool
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mxm_match_dcb(struct drm_device *dev, u8 *data, void *info)
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{
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struct context *ctx = info;
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u64 desc = *(u64 *)data;
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mxms_output_device(dev, data, &ctx->desc);
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/* match dcb encoder type to mxm-ods device type */
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if ((ctx->outp[0] & 0x0000000f) != ctx->desc.outp_type)
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return true;
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/* digital output, have some extra stuff to match here, there's a
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* table in the vbios that provides a mapping from the mxm digital
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* connection enum values to SOR/link
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*/
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if ((desc & 0x00000000000000f0) >= 0x20) {
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/* check against sor index */
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u8 link = mxm_sor_map(dev, ctx->desc.dig_conn);
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if ((ctx->outp[0] & 0x0f000000) != (link & 0x0f) << 24)
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return true;
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/* check dcb entry has a compatible link field */
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link = (link & 0x30) >> 4;
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if ((link & ((ctx->outp[1] & 0x00000030) >> 4)) != link)
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return true;
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}
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/* mark this descriptor accounted for by setting invalid device type,
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* except of course some manufactures don't follow specs properly and
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* we need to avoid killing off the TMDS function on DP connectors
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* if MXM-SIS is missing an entry for it.
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*/
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data[0] &= ~0xf0;
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if (ctx->desc.outp_type == 6 && ctx->desc.conn_type == 6 &&
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mxms_foreach(dev, 0x01, mxm_match_tmds_partner, ctx)) {
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data[0] |= 0x20; /* modify descriptor to match TMDS now */
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} else {
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data[0] |= 0xf0;
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}
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return false;
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}
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static int
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mxm_dcb_sanitise_entry(struct drm_device *dev, void *data, int idx, u8 *dcbe)
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{
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struct context ctx = { .outp = (u32 *)dcbe };
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u8 type, i2cidx, link;
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u8 *conn;
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/* look for an output device structure that matches this dcb entry.
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* if one isn't found, disable it.
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*/
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if (mxms_foreach(dev, 0x01, mxm_match_dcb, &ctx)) {
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MXM_DBG(dev, "disable %d: 0x%08x 0x%08x\n",
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idx, ctx.outp[0], ctx.outp[1]);
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ctx.outp[0] |= 0x0000000f;
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return 0;
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}
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/* modify the output's ddc/aux port, there's a pointer to a table
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* with the mapping from mxm ddc/aux port to dcb i2c_index in the
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* vbios mxm table
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*/
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i2cidx = mxm_ddc_map(dev, ctx.desc.ddc_port);
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if ((ctx.outp[0] & 0x0000000f) != OUTPUT_DP)
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i2cidx = (i2cidx & 0x0f) << 4;
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else
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i2cidx = (i2cidx & 0xf0);
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if (i2cidx != 0xf0) {
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ctx.outp[0] &= ~0x000000f0;
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ctx.outp[0] |= i2cidx;
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}
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/* override dcb sorconf.link, based on what mxm data says */
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switch (ctx.desc.outp_type) {
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case 0x00: /* Analog CRT */
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case 0x01: /* Analog TV/HDTV */
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break;
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default:
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link = mxm_sor_map(dev, ctx.desc.dig_conn) & 0x30;
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ctx.outp[1] &= ~0x00000030;
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ctx.outp[1] |= link;
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break;
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}
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/* we may need to fixup various other vbios tables based on what
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* the descriptor says the connector type should be.
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*
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* in a lot of cases, the vbios tables will claim DVI-I is possible,
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* and the mxm data says the connector is really HDMI. another
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* common example is DP->eDP.
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*/
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conn = dcb_conn(dev, (ctx.outp[0] & 0x0000f000) >> 12);
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type = conn[0];
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switch (ctx.desc.conn_type) {
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case 0x01: /* LVDS */
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ctx.outp[1] |= 0x00000004; /* use_power_scripts */
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/* XXX: modify default link width in LVDS table */
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break;
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case 0x02: /* HDMI */
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type = DCB_CONNECTOR_HDMI_1;
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break;
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case 0x03: /* DVI-D */
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type = DCB_CONNECTOR_DVI_D;
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break;
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case 0x0e: /* eDP, falls through to DPint */
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ctx.outp[1] |= 0x00010000;
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case 0x07: /* DP internal, wtf is this?? HP8670w */
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ctx.outp[1] |= 0x00000004; /* use_power_scripts? */
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type = DCB_CONNECTOR_eDP;
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break;
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default:
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break;
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}
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if (mxms_version(dev) >= 0x0300)
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conn[0] = type;
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return 0;
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}
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static bool
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mxm_show_unmatched(struct drm_device *dev, u8 *data, void *info)
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{
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u64 desc = *(u64 *)data;
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if ((desc & 0xf0) != 0xf0)
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MXM_MSG(dev, "unmatched output device 0x%016llx\n", desc);
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return true;
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}
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static void
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mxm_dcb_sanitise(struct drm_device *dev)
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{
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u8 *dcb = dcb_table(dev);
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if (!dcb || dcb[0] != 0x40) {
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MXM_DBG(dev, "unsupported DCB version\n");
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return;
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}
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dcb_outp_foreach(dev, NULL, mxm_dcb_sanitise_entry);
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mxms_foreach(dev, 0x01, mxm_show_unmatched, NULL);
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}
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static bool
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mxm_shadow_rom_fetch(struct nouveau_i2c_chan *i2c, u8 addr,
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u8 offset, u8 size, u8 *data)
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{
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struct i2c_msg msgs[] = {
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{ .addr = addr, .flags = 0, .len = 1, .buf = &offset },
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{ .addr = addr, .flags = I2C_M_RD, .len = size, .buf = data, },
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};
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return i2c_transfer(&i2c->adapter, msgs, 2) == 2;
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}
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static bool
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mxm_shadow_rom(struct drm_device *dev, u8 version)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
|
|
struct nouveau_i2c_chan *i2c = NULL;
|
|
u8 i2cidx, mxms[6], addr, size;
|
|
|
|
i2cidx = mxm_ddc_map(dev, 1 /* LVDS_DDC */) & 0x0f;
|
|
if (i2cidx < 0x0f)
|
|
i2c = nouveau_i2c_find(dev, i2cidx);
|
|
if (!i2c)
|
|
return false;
|
|
|
|
addr = 0x54;
|
|
if (!mxm_shadow_rom_fetch(i2c, addr, 0, 6, mxms)) {
|
|
addr = 0x56;
|
|
if (!mxm_shadow_rom_fetch(i2c, addr, 0, 6, mxms))
|
|
return false;
|
|
}
|
|
|
|
dev_priv->mxms = mxms;
|
|
size = mxms_headerlen(dev) + mxms_structlen(dev);
|
|
dev_priv->mxms = kmalloc(size, GFP_KERNEL);
|
|
|
|
if (dev_priv->mxms &&
|
|
mxm_shadow_rom_fetch(i2c, addr, 0, size, dev_priv->mxms))
|
|
return true;
|
|
|
|
kfree(dev_priv->mxms);
|
|
dev_priv->mxms = NULL;
|
|
return false;
|
|
}
|
|
|
|
#if defined(CONFIG_ACPI)
|
|
static bool
|
|
mxm_shadow_dsm(struct drm_device *dev, u8 version)
|
|
{
|
|
struct drm_nouveau_private *dev_priv = dev->dev_private;
|
|
static char muid[] = {
|
|
0x00, 0xA4, 0x04, 0x40, 0x7D, 0x91, 0xF2, 0x4C,
|
|
0xB8, 0x9C, 0x79, 0xB6, 0x2F, 0xD5, 0x56, 0x65
|
|
};
|
|
u32 mxms_args[] = { 0x00000000 };
|
|
union acpi_object args[4] = {
|
|
/* _DSM MUID */
|
|
{ .buffer.type = 3,
|
|
.buffer.length = sizeof(muid),
|
|
.buffer.pointer = muid,
|
|
},
|
|
/* spec says this can be zero to mean "highest revision", but
|
|
* of course there's at least one bios out there which fails
|
|
* unless you pass in exactly the version it supports..
|
|
*/
|
|
{ .integer.type = ACPI_TYPE_INTEGER,
|
|
.integer.value = (version & 0xf0) << 4 | (version & 0x0f),
|
|
},
|
|
/* MXMS function */
|
|
{ .integer.type = ACPI_TYPE_INTEGER,
|
|
.integer.value = 0x00000010,
|
|
},
|
|
/* Pointer to MXMS arguments */
|
|
{ .buffer.type = ACPI_TYPE_BUFFER,
|
|
.buffer.length = sizeof(mxms_args),
|
|
.buffer.pointer = (char *)mxms_args,
|
|
},
|
|
};
|
|
struct acpi_object_list list = { ARRAY_SIZE(args), args };
|
|
struct acpi_buffer retn = { ACPI_ALLOCATE_BUFFER, NULL };
|
|
union acpi_object *obj;
|
|
acpi_handle handle;
|
|
int ret;
|
|
|
|
handle = DEVICE_ACPI_HANDLE(&dev->pdev->dev);
|
|
if (!handle)
|
|
return false;
|
|
|
|
ret = acpi_evaluate_object(handle, "_DSM", &list, &retn);
|
|
if (ret) {
|
|
MXM_DBG(dev, "DSM MXMS failed: %d\n", ret);
|
|
return false;
|
|
}
|
|
|
|
obj = retn.pointer;
|
|
if (obj->type == ACPI_TYPE_BUFFER) {
|
|
dev_priv->mxms = kmemdup(obj->buffer.pointer,
|
|
obj->buffer.length, GFP_KERNEL);
|
|
} else
|
|
if (obj->type == ACPI_TYPE_INTEGER) {
|
|
MXM_DBG(dev, "DSM MXMS returned 0x%llx\n", obj->integer.value);
|
|
}
|
|
|
|
kfree(obj);
|
|
return dev_priv->mxms != NULL;
|
|
}
|
|
#endif
|
|
|
|
#if defined(CONFIG_ACPI_WMI) || defined(CONFIG_ACPI_WMI_MODULE)
|
|
|
|
#define WMI_WMMX_GUID "F6CB5C3C-9CAE-4EBD-B577-931EA32A2CC0"
|
|
|
|
static u8
|
|
wmi_wmmx_mxmi(struct drm_device *dev, u8 version)
|
|
{
|
|
u32 mxmi_args[] = { 0x494D584D /* MXMI */, version, 0 };
|
|
struct acpi_buffer args = { sizeof(mxmi_args), mxmi_args };
|
|
struct acpi_buffer retn = { ACPI_ALLOCATE_BUFFER, NULL };
|
|
union acpi_object *obj;
|
|
acpi_status status;
|
|
|
|
status = wmi_evaluate_method(WMI_WMMX_GUID, 0, 0, &args, &retn);
|
|
if (ACPI_FAILURE(status)) {
|
|
MXM_DBG(dev, "WMMX MXMI returned %d\n", status);
|
|
return 0x00;
|
|
}
|
|
|
|
obj = retn.pointer;
|
|
if (obj->type == ACPI_TYPE_INTEGER) {
|
|
version = obj->integer.value;
|
|
MXM_DBG(dev, "WMMX MXMI version %d.%d\n",
|
|
(version >> 4), version & 0x0f);
|
|
} else {
|
|
version = 0;
|
|
MXM_DBG(dev, "WMMX MXMI returned non-integer\n");
|
|
}
|
|
|
|
kfree(obj);
|
|
return version;
|
|
}
|
|
|
|
static bool
|
|
mxm_shadow_wmi(struct drm_device *dev, u8 version)
|
|
{
|
|
struct drm_nouveau_private *dev_priv = dev->dev_private;
|
|
u32 mxms_args[] = { 0x534D584D /* MXMS */, version, 0 };
|
|
struct acpi_buffer args = { sizeof(mxms_args), mxms_args };
|
|
struct acpi_buffer retn = { ACPI_ALLOCATE_BUFFER, NULL };
|
|
union acpi_object *obj;
|
|
acpi_status status;
|
|
|
|
if (!wmi_has_guid(WMI_WMMX_GUID)) {
|
|
MXM_DBG(dev, "WMMX GUID not found\n");
|
|
return false;
|
|
}
|
|
|
|
mxms_args[1] = wmi_wmmx_mxmi(dev, 0x00);
|
|
if (!mxms_args[1])
|
|
mxms_args[1] = wmi_wmmx_mxmi(dev, version);
|
|
if (!mxms_args[1])
|
|
return false;
|
|
|
|
status = wmi_evaluate_method(WMI_WMMX_GUID, 0, 0, &args, &retn);
|
|
if (ACPI_FAILURE(status)) {
|
|
MXM_DBG(dev, "WMMX MXMS returned %d\n", status);
|
|
return false;
|
|
}
|
|
|
|
obj = retn.pointer;
|
|
if (obj->type == ACPI_TYPE_BUFFER) {
|
|
dev_priv->mxms = kmemdup(obj->buffer.pointer,
|
|
obj->buffer.length, GFP_KERNEL);
|
|
}
|
|
|
|
kfree(obj);
|
|
return dev_priv->mxms != NULL;
|
|
}
|
|
#endif
|
|
|
|
struct mxm_shadow_h {
|
|
const char *name;
|
|
bool (*exec)(struct drm_device *, u8 version);
|
|
} _mxm_shadow[] = {
|
|
{ "ROM", mxm_shadow_rom },
|
|
#if defined(CONFIG_ACPI)
|
|
{ "DSM", mxm_shadow_dsm },
|
|
#endif
|
|
#if defined(CONFIG_ACPI_WMI) || defined(CONFIG_ACPI_WMI_MODULE)
|
|
{ "WMI", mxm_shadow_wmi },
|
|
#endif
|
|
{}
|
|
};
|
|
|
|
static int
|
|
mxm_shadow(struct drm_device *dev, u8 version)
|
|
{
|
|
struct drm_nouveau_private *dev_priv = dev->dev_private;
|
|
struct mxm_shadow_h *shadow = _mxm_shadow;
|
|
do {
|
|
MXM_DBG(dev, "checking %s\n", shadow->name);
|
|
if (shadow->exec(dev, version)) {
|
|
if (mxms_valid(dev))
|
|
return 0;
|
|
kfree(dev_priv->mxms);
|
|
dev_priv->mxms = NULL;
|
|
}
|
|
} while ((++shadow)->name);
|
|
return -ENOENT;
|
|
}
|
|
|
|
int
|
|
nouveau_mxm_init(struct drm_device *dev)
|
|
{
|
|
u8 mxm_size, *mxm = mxm_table(dev, &mxm_size);
|
|
if (!mxm || !mxm[0]) {
|
|
MXM_MSG(dev, "no VBIOS data, nothing to do\n");
|
|
return 0;
|
|
}
|
|
|
|
MXM_MSG(dev, "BIOS version %d.%d\n", mxm[0] >> 4, mxm[0] & 0x0f);
|
|
|
|
if (mxm_shadow(dev, mxm[0])) {
|
|
MXM_MSG(dev, "failed to locate valid SIS\n");
|
|
#if 0
|
|
/* we should, perhaps, fall back to some kind of limited
|
|
* mode here if the x86 vbios hasn't already done the
|
|
* work for us (so we prevent loading with completely
|
|
* whacked vbios tables).
|
|
*/
|
|
return -EINVAL;
|
|
#else
|
|
return 0;
|
|
#endif
|
|
}
|
|
|
|
MXM_MSG(dev, "MXMS Version %d.%d\n",
|
|
mxms_version(dev) >> 8, mxms_version(dev) & 0xff);
|
|
mxms_foreach(dev, 0, NULL, NULL);
|
|
|
|
if (nouveau_mxmdcb)
|
|
mxm_dcb_sanitise(dev);
|
|
return 0;
|
|
}
|
|
|
|
void
|
|
nouveau_mxm_fini(struct drm_device *dev)
|
|
{
|
|
struct drm_nouveau_private *dev_priv = dev->dev_private;
|
|
kfree(dev_priv->mxms);
|
|
dev_priv->mxms = NULL;
|
|
}
|