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cce8ccca80
As warned by cppcheck: [drivers/media/dvb-frontends/cx24123.c:434]: (error) Shifting signed 32-bit value by 31 bits is undefined behaviour [drivers/media/pci/bt8xx/bttv-input.c:87]: (error) Shifting signed 32-bit value by 31 bits is undefined behaviour [drivers/media/pci/bt8xx/bttv-input.c:98]: (error) Shifting signed 32-bit value by 31 bits is undefined behaviour ... [drivers/media/v4l2-core/v4l2-ioctl.c:1391]: (error) Shifting signed 32-bit value by 31 bits is undefined behaviour There are lots of places where we're doing 1 << 31. That's bad, as, depending on the architecture, this has an undefined behavior. The BIT() macro is already prepared to handle this, so, let's just switch all "1 << number" macros by BIT(number) at the header files with has 1 << 31. Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> # exynos4-is and s3c-camif Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> # omap3isp, vsp1, xilinx, wl128x and ipu3 Reviewed-by: Benoit Parrot <bparrot@ti.com> # am437x and ti-vpe Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
42 lines
1.3 KiB
C
42 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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interrupt handling
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Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>
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Copyright (C) 2004 Chris Kennedy <c@groovy.org>
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Copyright (C) 2005-2007 Hans Verkuil <hverkuil@xs4all.nl>
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*/
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#ifndef IVTV_IRQ_H
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#define IVTV_IRQ_H
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#define IVTV_IRQ_ENC_START_CAP BIT(31)
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#define IVTV_IRQ_ENC_EOS BIT(30)
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#define IVTV_IRQ_ENC_VBI_CAP BIT(29)
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#define IVTV_IRQ_ENC_VIM_RST BIT(28)
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#define IVTV_IRQ_ENC_DMA_COMPLETE BIT(27)
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#define IVTV_IRQ_ENC_PIO_COMPLETE BIT(25)
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#define IVTV_IRQ_DEC_AUD_MODE_CHG BIT(24)
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#define IVTV_IRQ_DEC_DATA_REQ BIT(22)
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#define IVTV_IRQ_DEC_DMA_COMPLETE BIT(20)
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#define IVTV_IRQ_DEC_VBI_RE_INSERT BIT(19)
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#define IVTV_IRQ_DMA_ERR BIT(18)
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#define IVTV_IRQ_DMA_WRITE BIT(17)
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#define IVTV_IRQ_DMA_READ BIT(16)
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#define IVTV_IRQ_DEC_VSYNC BIT(10)
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/* IRQ Masks */
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#define IVTV_IRQ_MASK_INIT (IVTV_IRQ_DMA_ERR|IVTV_IRQ_ENC_DMA_COMPLETE|\
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IVTV_IRQ_DMA_READ|IVTV_IRQ_ENC_PIO_COMPLETE)
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#define IVTV_IRQ_MASK_CAPTURE (IVTV_IRQ_ENC_START_CAP | IVTV_IRQ_ENC_EOS)
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#define IVTV_IRQ_MASK_DECODE (IVTV_IRQ_DEC_DATA_REQ|IVTV_IRQ_DEC_AUD_MODE_CHG)
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irqreturn_t ivtv_irq_handler(int irq, void *dev_id);
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void ivtv_irq_work_handler(struct kthread_work *work);
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void ivtv_dma_stream_dec_prepare(struct ivtv_stream *s, u32 offset, int lock);
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void ivtv_unfinished_dma(struct timer_list *t);
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#endif
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