mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ff4a7481c3
Update license to use SPDX-License-Identifier instead of verbose license
text.
As original license mentioned, it is GPL-2.0 in SPDX.
Then, MODULE_LICENSE() should be "GPL v2" instead of "GPL".
See ${LINUX}/include/linux/module.h
"GPL" [GNU Public License v2 or later]
"GPL v2" [GNU Public License v2]
Link: http://lkml.kernel.org/r/87h8fsct0a.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Cc: Rich Felker <dalias@libc.org>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
58 lines
1.4 KiB
C
58 lines
1.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* arch/sh/drivers/pci/fixups-landisk.c
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*
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* PCI initialization for the I-O DATA Device, Inc. LANDISK board
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*
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* Copyright (C) 2006 kogiidena
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* Copyright (C) 2010 Nobuhiro Iwamatsu
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/pci.h>
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#include <linux/sh_intc.h>
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#include "pci-sh4.h"
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#define PCIMCR_MRSET_OFF 0xBFFFFFFF
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#define PCIMCR_RFSH_OFF 0xFFFFFFFB
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int pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
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{
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/*
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* slot0: pin1-4 = irq5,6,7,8
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* slot1: pin1-4 = irq6,7,8,5
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* slot2: pin1-4 = irq7,8,5,6
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* slot3: pin1-4 = irq8,5,6,7
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*/
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int irq = ((slot + pin - 1) & 0x3) + evt2irq(0x2a0);
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if ((slot | (pin - 1)) > 0x3) {
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printk(KERN_WARNING "PCI: Bad IRQ mapping request for slot %d pin %c\n",
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slot, pin - 1 + 'A');
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return -1;
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}
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return irq;
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}
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int pci_fixup_pcic(struct pci_channel *chan)
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{
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unsigned long bcr1, mcr;
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bcr1 = __raw_readl(SH7751_BCR1);
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bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
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pci_write_reg(chan, bcr1, SH4_PCIBCR1);
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mcr = __raw_readl(SH7751_MCR);
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mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
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pci_write_reg(chan, mcr, SH4_PCIMCR);
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pci_write_reg(chan, 0x0c000000, SH7751_PCICONF5);
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pci_write_reg(chan, 0xd0000000, SH7751_PCICONF6);
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pci_write_reg(chan, 0x0c000000, SH4_PCILAR0);
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pci_write_reg(chan, 0x00000000, SH4_PCILAR1);
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return 0;
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}
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