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ba9196d2e0
DI(Disable Interrupt) and EI(Enable Interrupt) instructions is required by MIPSR2/MIPSR6, however, it appears to be buggy on some processors such as Loongson-3A1000. Thus we make it as a config option to allow disable it at compile time with CPU_MIPSR2 selected. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Paul Burton <paulburton@kernel.org> Cc: linux-mips@vger.kernel.org Cc: chenhc@lemote.com Cc: paul.burton@mips.com Cc: linux-kernel@vger.kernel.org |
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.. | ||
bitops.c | ||
bswapdi.c | ||
bswapsi.c | ||
csum_partial.S | ||
delay.c | ||
dump_tlb.c | ||
iomap_copy.c | ||
iomap-pci.c | ||
libgcc.h | ||
Makefile | ||
memcpy.S | ||
memset.S | ||
mips-atomic.c | ||
multi3.c | ||
r3k_dump_tlb.c | ||
strncpy_user.S | ||
strnlen_user.S | ||
uncached.c |