mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-01-26 05:39:22 +07:00
57799ce9f8
Future F/W versions will have enhanced security measures and the driver won't be able to do certain configurations that it always did and those configurations will be done by the firmware. We use the firmware's preboot version to determine whether security measures are enabled or not. Because we need this very early in our code, the read of the preboot version is moved to the earliest possible place, right after the device's PCI initialization. Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
712 lines
17 KiB
C
712 lines
17 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2016-2019 HabanaLabs, Ltd.
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* All Rights Reserved.
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*/
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#include "habanalabs.h"
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#include "../include/common/hl_boot_if.h"
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#include <linux/firmware.h>
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#include <linux/genalloc.h>
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#include <linux/io-64-nonatomic-lo-hi.h>
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#include <linux/slab.h>
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#define FW_FILE_MAX_SIZE 0x1400000 /* maximum size of 20MB */
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/**
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* hl_fw_load_fw_to_device() - Load F/W code to device's memory.
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*
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* @hdev: pointer to hl_device structure.
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* @fw_name: the firmware image name
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* @dst: IO memory mapped address space to copy firmware to
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*
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* Copy fw code from firmware file to device memory.
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*
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* Return: 0 on success, non-zero for failure.
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*/
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int hl_fw_load_fw_to_device(struct hl_device *hdev, const char *fw_name,
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void __iomem *dst)
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{
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const struct firmware *fw;
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const u64 *fw_data;
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size_t fw_size;
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int rc;
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rc = request_firmware(&fw, fw_name, hdev->dev);
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if (rc) {
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dev_err(hdev->dev, "Firmware file %s is not found!\n", fw_name);
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goto out;
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}
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fw_size = fw->size;
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if ((fw_size % 4) != 0) {
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dev_err(hdev->dev, "Illegal %s firmware size %zu\n",
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fw_name, fw_size);
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rc = -EINVAL;
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goto out;
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}
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dev_dbg(hdev->dev, "%s firmware size == %zu\n", fw_name, fw_size);
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if (fw_size > FW_FILE_MAX_SIZE) {
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dev_err(hdev->dev,
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"FW file size %zu exceeds maximum of %u bytes\n",
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fw_size, FW_FILE_MAX_SIZE);
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rc = -EINVAL;
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goto out;
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}
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fw_data = (const u64 *) fw->data;
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memcpy_toio(dst, fw_data, fw_size);
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out:
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release_firmware(fw);
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return rc;
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}
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int hl_fw_send_pci_access_msg(struct hl_device *hdev, u32 opcode)
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{
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struct cpucp_packet pkt = {};
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pkt.ctl = cpu_to_le32(opcode << CPUCP_PKT_CTL_OPCODE_SHIFT);
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return hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt,
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sizeof(pkt), 0, NULL);
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}
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int hl_fw_send_cpu_message(struct hl_device *hdev, u32 hw_queue_id, u32 *msg,
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u16 len, u32 timeout, long *result)
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{
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struct cpucp_packet *pkt;
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dma_addr_t pkt_dma_addr;
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u32 tmp;
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int rc = 0;
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pkt = hdev->asic_funcs->cpu_accessible_dma_pool_alloc(hdev, len,
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&pkt_dma_addr);
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if (!pkt) {
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dev_err(hdev->dev,
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"Failed to allocate DMA memory for packet to CPU\n");
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return -ENOMEM;
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}
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memcpy(pkt, msg, len);
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mutex_lock(&hdev->send_cpu_message_lock);
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if (hdev->disabled)
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goto out;
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if (hdev->device_cpu_disabled) {
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rc = -EIO;
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goto out;
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}
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rc = hl_hw_queue_send_cb_no_cmpl(hdev, hw_queue_id, len, pkt_dma_addr);
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if (rc) {
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dev_err(hdev->dev, "Failed to send CB on CPU PQ (%d)\n", rc);
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goto out;
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}
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rc = hl_poll_timeout_memory(hdev, &pkt->fence, tmp,
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(tmp == CPUCP_PACKET_FENCE_VAL), 1000,
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timeout, true);
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hl_hw_queue_inc_ci_kernel(hdev, hw_queue_id);
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if (rc == -ETIMEDOUT) {
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dev_err(hdev->dev, "Device CPU packet timeout (0x%x)\n", tmp);
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hdev->device_cpu_disabled = true;
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goto out;
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}
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tmp = le32_to_cpu(pkt->ctl);
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rc = (tmp & CPUCP_PKT_CTL_RC_MASK) >> CPUCP_PKT_CTL_RC_SHIFT;
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if (rc) {
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dev_err(hdev->dev, "F/W ERROR %d for CPU packet %d\n",
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rc,
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(tmp & CPUCP_PKT_CTL_OPCODE_MASK)
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>> CPUCP_PKT_CTL_OPCODE_SHIFT);
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rc = -EIO;
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} else if (result) {
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*result = (long) le64_to_cpu(pkt->result);
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}
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out:
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mutex_unlock(&hdev->send_cpu_message_lock);
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hdev->asic_funcs->cpu_accessible_dma_pool_free(hdev, len, pkt);
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return rc;
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}
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int hl_fw_unmask_irq(struct hl_device *hdev, u16 event_type)
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{
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struct cpucp_packet pkt;
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long result;
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int rc;
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memset(&pkt, 0, sizeof(pkt));
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pkt.ctl = cpu_to_le32(CPUCP_PACKET_UNMASK_RAZWI_IRQ <<
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CPUCP_PKT_CTL_OPCODE_SHIFT);
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pkt.value = cpu_to_le64(event_type);
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rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
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0, &result);
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if (rc)
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dev_err(hdev->dev, "failed to unmask RAZWI IRQ %d", event_type);
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return rc;
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}
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int hl_fw_unmask_irq_arr(struct hl_device *hdev, const u32 *irq_arr,
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size_t irq_arr_size)
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{
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struct cpucp_unmask_irq_arr_packet *pkt;
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size_t total_pkt_size;
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long result;
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int rc;
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total_pkt_size = sizeof(struct cpucp_unmask_irq_arr_packet) +
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irq_arr_size;
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/* data should be aligned to 8 bytes in order to CPU-CP to copy it */
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total_pkt_size = (total_pkt_size + 0x7) & ~0x7;
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/* total_pkt_size is casted to u16 later on */
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if (total_pkt_size > USHRT_MAX) {
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dev_err(hdev->dev, "too many elements in IRQ array\n");
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return -EINVAL;
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}
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pkt = kzalloc(total_pkt_size, GFP_KERNEL);
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if (!pkt)
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return -ENOMEM;
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pkt->length = cpu_to_le32(irq_arr_size / sizeof(irq_arr[0]));
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memcpy(&pkt->irqs, irq_arr, irq_arr_size);
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pkt->cpucp_pkt.ctl = cpu_to_le32(CPUCP_PACKET_UNMASK_RAZWI_IRQ_ARRAY <<
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CPUCP_PKT_CTL_OPCODE_SHIFT);
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rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) pkt,
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total_pkt_size, 0, &result);
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if (rc)
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dev_err(hdev->dev, "failed to unmask IRQ array\n");
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kfree(pkt);
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return rc;
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}
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int hl_fw_test_cpu_queue(struct hl_device *hdev)
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{
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struct cpucp_packet test_pkt = {};
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long result;
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int rc;
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test_pkt.ctl = cpu_to_le32(CPUCP_PACKET_TEST <<
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CPUCP_PKT_CTL_OPCODE_SHIFT);
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test_pkt.value = cpu_to_le64(CPUCP_PACKET_FENCE_VAL);
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rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &test_pkt,
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sizeof(test_pkt), 0, &result);
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if (!rc) {
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if (result != CPUCP_PACKET_FENCE_VAL)
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dev_err(hdev->dev,
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"CPU queue test failed (0x%08lX)\n", result);
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} else {
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dev_err(hdev->dev, "CPU queue test failed, error %d\n", rc);
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}
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return rc;
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}
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void *hl_fw_cpu_accessible_dma_pool_alloc(struct hl_device *hdev, size_t size,
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dma_addr_t *dma_handle)
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{
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u64 kernel_addr;
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kernel_addr = gen_pool_alloc(hdev->cpu_accessible_dma_pool, size);
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*dma_handle = hdev->cpu_accessible_dma_address +
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(kernel_addr - (u64) (uintptr_t) hdev->cpu_accessible_dma_mem);
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return (void *) (uintptr_t) kernel_addr;
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}
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void hl_fw_cpu_accessible_dma_pool_free(struct hl_device *hdev, size_t size,
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void *vaddr)
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{
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gen_pool_free(hdev->cpu_accessible_dma_pool, (u64) (uintptr_t) vaddr,
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size);
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}
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int hl_fw_send_heartbeat(struct hl_device *hdev)
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{
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struct cpucp_packet hb_pkt = {};
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long result;
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int rc;
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hb_pkt.ctl = cpu_to_le32(CPUCP_PACKET_TEST <<
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CPUCP_PKT_CTL_OPCODE_SHIFT);
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hb_pkt.value = cpu_to_le64(CPUCP_PACKET_FENCE_VAL);
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rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &hb_pkt,
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sizeof(hb_pkt), 0, &result);
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if ((rc) || (result != CPUCP_PACKET_FENCE_VAL))
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rc = -EIO;
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return rc;
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}
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int hl_fw_cpucp_info_get(struct hl_device *hdev)
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{
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struct asic_fixed_properties *prop = &hdev->asic_prop;
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struct cpucp_packet pkt = {};
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void *cpucp_info_cpu_addr;
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dma_addr_t cpucp_info_dma_addr;
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long result;
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int rc;
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cpucp_info_cpu_addr =
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hdev->asic_funcs->cpu_accessible_dma_pool_alloc(hdev,
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sizeof(struct cpucp_info),
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&cpucp_info_dma_addr);
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if (!cpucp_info_cpu_addr) {
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dev_err(hdev->dev,
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"Failed to allocate DMA memory for CPU-CP info packet\n");
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return -ENOMEM;
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}
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memset(cpucp_info_cpu_addr, 0, sizeof(struct cpucp_info));
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pkt.ctl = cpu_to_le32(CPUCP_PACKET_INFO_GET <<
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CPUCP_PKT_CTL_OPCODE_SHIFT);
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pkt.addr = cpu_to_le64(cpucp_info_dma_addr);
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pkt.data_max_size = cpu_to_le32(sizeof(struct cpucp_info));
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rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
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HL_CPUCP_INFO_TIMEOUT_USEC, &result);
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if (rc) {
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dev_err(hdev->dev,
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"Failed to handle CPU-CP info pkt, error %d\n", rc);
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goto out;
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}
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memcpy(&prop->cpucp_info, cpucp_info_cpu_addr,
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sizeof(prop->cpucp_info));
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rc = hl_build_hwmon_channel_info(hdev, prop->cpucp_info.sensors);
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if (rc) {
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dev_err(hdev->dev,
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"Failed to build hwmon channel info, error %d\n", rc);
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rc = -EFAULT;
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goto out;
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}
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out:
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hdev->asic_funcs->cpu_accessible_dma_pool_free(hdev,
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sizeof(struct cpucp_info), cpucp_info_cpu_addr);
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return rc;
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}
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int hl_fw_get_eeprom_data(struct hl_device *hdev, void *data, size_t max_size)
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{
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struct cpucp_packet pkt = {};
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void *eeprom_info_cpu_addr;
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dma_addr_t eeprom_info_dma_addr;
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long result;
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int rc;
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eeprom_info_cpu_addr =
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hdev->asic_funcs->cpu_accessible_dma_pool_alloc(hdev,
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max_size, &eeprom_info_dma_addr);
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if (!eeprom_info_cpu_addr) {
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dev_err(hdev->dev,
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"Failed to allocate DMA memory for CPU-CP EEPROM packet\n");
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return -ENOMEM;
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}
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memset(eeprom_info_cpu_addr, 0, max_size);
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pkt.ctl = cpu_to_le32(CPUCP_PACKET_EEPROM_DATA_GET <<
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CPUCP_PKT_CTL_OPCODE_SHIFT);
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pkt.addr = cpu_to_le64(eeprom_info_dma_addr);
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pkt.data_max_size = cpu_to_le32(max_size);
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rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
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HL_CPUCP_EEPROM_TIMEOUT_USEC, &result);
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if (rc) {
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dev_err(hdev->dev,
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"Failed to handle CPU-CP EEPROM packet, error %d\n",
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rc);
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goto out;
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}
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/* result contains the actual size */
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memcpy(data, eeprom_info_cpu_addr, min((size_t)result, max_size));
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out:
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hdev->asic_funcs->cpu_accessible_dma_pool_free(hdev, max_size,
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eeprom_info_cpu_addr);
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return rc;
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}
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int hl_fw_cpucp_pci_counters_get(struct hl_device *hdev,
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struct hl_info_pci_counters *counters)
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{
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struct cpucp_packet pkt = {};
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long result;
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int rc;
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pkt.ctl = cpu_to_le32(CPUCP_PACKET_PCIE_THROUGHPUT_GET <<
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CPUCP_PKT_CTL_OPCODE_SHIFT);
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/* Fetch PCI rx counter */
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pkt.index = cpu_to_le32(cpucp_pcie_throughput_rx);
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rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
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HL_CPUCP_INFO_TIMEOUT_USEC, &result);
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if (rc) {
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dev_err(hdev->dev,
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"Failed to handle CPU-CP PCI info pkt, error %d\n", rc);
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return rc;
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}
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counters->rx_throughput = result;
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/* Fetch PCI tx counter */
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pkt.index = cpu_to_le32(cpucp_pcie_throughput_tx);
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rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
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HL_CPUCP_INFO_TIMEOUT_USEC, &result);
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if (rc) {
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dev_err(hdev->dev,
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"Failed to handle CPU-CP PCI info pkt, error %d\n", rc);
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return rc;
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}
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counters->tx_throughput = result;
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/* Fetch PCI replay counter */
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pkt.ctl = cpu_to_le32(CPUCP_PACKET_PCIE_REPLAY_CNT_GET <<
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CPUCP_PKT_CTL_OPCODE_SHIFT);
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rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
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HL_CPUCP_INFO_TIMEOUT_USEC, &result);
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if (rc) {
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dev_err(hdev->dev,
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"Failed to handle CPU-CP PCI info pkt, error %d\n", rc);
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return rc;
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}
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counters->replay_cnt = (u32) result;
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return rc;
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}
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int hl_fw_cpucp_total_energy_get(struct hl_device *hdev, u64 *total_energy)
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{
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struct cpucp_packet pkt = {};
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long result;
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int rc;
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pkt.ctl = cpu_to_le32(CPUCP_PACKET_TOTAL_ENERGY_GET <<
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CPUCP_PKT_CTL_OPCODE_SHIFT);
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rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
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HL_CPUCP_INFO_TIMEOUT_USEC, &result);
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if (rc) {
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dev_err(hdev->dev,
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"Failed to handle CpuCP total energy pkt, error %d\n",
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rc);
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return rc;
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}
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*total_energy = result;
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return rc;
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}
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static void fw_read_errors(struct hl_device *hdev, u32 boot_err0_reg)
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{
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u32 err_val;
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/* Some of the firmware status codes are deprecated in newer f/w
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* versions. In those versions, the errors are reported
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* in different registers. Therefore, we need to check those
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* registers and print the exact errors. Moreover, there
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* may be multiple errors, so we need to report on each error
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* separately. Some of the error codes might indicate a state
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* that is not an error per-se, but it is an error in production
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* environment
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*/
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err_val = RREG32(boot_err0_reg);
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if (!(err_val & CPU_BOOT_ERR0_ENABLED))
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return;
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if (err_val & CPU_BOOT_ERR0_DRAM_INIT_FAIL)
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dev_err(hdev->dev,
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"Device boot error - DRAM initialization failed\n");
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if (err_val & CPU_BOOT_ERR0_FIT_CORRUPTED)
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dev_err(hdev->dev, "Device boot error - FIT image corrupted\n");
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if (err_val & CPU_BOOT_ERR0_TS_INIT_FAIL)
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dev_err(hdev->dev,
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"Device boot error - Thermal Sensor initialization failed\n");
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if (err_val & CPU_BOOT_ERR0_DRAM_SKIPPED)
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dev_warn(hdev->dev,
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"Device boot warning - Skipped DRAM initialization\n");
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if (err_val & CPU_BOOT_ERR0_BMC_WAIT_SKIPPED)
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dev_warn(hdev->dev,
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"Device boot error - Skipped waiting for BMC\n");
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if (err_val & CPU_BOOT_ERR0_NIC_DATA_NOT_RDY)
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dev_err(hdev->dev,
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"Device boot error - Serdes data from BMC not available\n");
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if (err_val & CPU_BOOT_ERR0_NIC_FW_FAIL)
|
|
dev_err(hdev->dev,
|
|
"Device boot error - NIC F/W initialization failed\n");
|
|
}
|
|
|
|
static void detect_cpu_boot_status(struct hl_device *hdev, u32 status)
|
|
{
|
|
/* Some of the status codes below are deprecated in newer f/w
|
|
* versions but we keep them here for backward compatibility
|
|
*/
|
|
switch (status) {
|
|
case CPU_BOOT_STATUS_NA:
|
|
dev_err(hdev->dev,
|
|
"Device boot error - BTL did NOT run\n");
|
|
break;
|
|
case CPU_BOOT_STATUS_IN_WFE:
|
|
dev_err(hdev->dev,
|
|
"Device boot error - Stuck inside WFE loop\n");
|
|
break;
|
|
case CPU_BOOT_STATUS_IN_BTL:
|
|
dev_err(hdev->dev,
|
|
"Device boot error - Stuck in BTL\n");
|
|
break;
|
|
case CPU_BOOT_STATUS_IN_PREBOOT:
|
|
dev_err(hdev->dev,
|
|
"Device boot error - Stuck in Preboot\n");
|
|
break;
|
|
case CPU_BOOT_STATUS_IN_SPL:
|
|
dev_err(hdev->dev,
|
|
"Device boot error - Stuck in SPL\n");
|
|
break;
|
|
case CPU_BOOT_STATUS_IN_UBOOT:
|
|
dev_err(hdev->dev,
|
|
"Device boot error - Stuck in u-boot\n");
|
|
break;
|
|
case CPU_BOOT_STATUS_DRAM_INIT_FAIL:
|
|
dev_err(hdev->dev,
|
|
"Device boot error - DRAM initialization failed\n");
|
|
break;
|
|
case CPU_BOOT_STATUS_UBOOT_NOT_READY:
|
|
dev_err(hdev->dev,
|
|
"Device boot error - u-boot stopped by user\n");
|
|
break;
|
|
case CPU_BOOT_STATUS_TS_INIT_FAIL:
|
|
dev_err(hdev->dev,
|
|
"Device boot error - Thermal Sensor initialization failed\n");
|
|
break;
|
|
default:
|
|
dev_err(hdev->dev,
|
|
"Device boot error - Invalid status code %d\n",
|
|
status);
|
|
break;
|
|
}
|
|
}
|
|
|
|
int hl_fw_read_preboot_ver(struct hl_device *hdev, u32 cpu_boot_status_reg,
|
|
u32 boot_err0_reg, u32 timeout)
|
|
{
|
|
u32 status;
|
|
int rc;
|
|
|
|
if (!hdev->cpu_enable)
|
|
return 0;
|
|
|
|
/* Need to check two possible scenarios:
|
|
*
|
|
* CPU_BOOT_STATUS_WAITING_FOR_BOOT_FIT - for newer firmwares where
|
|
* the preboot is waiting for the boot fit
|
|
*
|
|
* All other status values - for older firmwares where the uboot was
|
|
* loaded from the FLASH
|
|
*/
|
|
rc = hl_poll_timeout(
|
|
hdev,
|
|
cpu_boot_status_reg,
|
|
status,
|
|
(status == CPU_BOOT_STATUS_IN_UBOOT) ||
|
|
(status == CPU_BOOT_STATUS_DRAM_RDY) ||
|
|
(status == CPU_BOOT_STATUS_NIC_FW_RDY) ||
|
|
(status == CPU_BOOT_STATUS_READY_TO_BOOT) ||
|
|
(status == CPU_BOOT_STATUS_SRAM_AVAIL) ||
|
|
(status == CPU_BOOT_STATUS_WAITING_FOR_BOOT_FIT),
|
|
10000,
|
|
timeout);
|
|
|
|
if (rc) {
|
|
dev_err(hdev->dev, "Failed to read preboot version\n");
|
|
detect_cpu_boot_status(hdev, status);
|
|
fw_read_errors(hdev, boot_err0_reg);
|
|
return -EIO;
|
|
}
|
|
|
|
hdev->asic_funcs->read_device_fw_version(hdev, FW_COMP_PREBOOT);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int hl_fw_init_cpu(struct hl_device *hdev, u32 cpu_boot_status_reg,
|
|
u32 msg_to_cpu_reg, u32 cpu_msg_status_reg,
|
|
u32 boot_err0_reg, bool skip_bmc,
|
|
u32 cpu_timeout, u32 boot_fit_timeout)
|
|
{
|
|
u32 status;
|
|
int rc;
|
|
|
|
dev_info(hdev->dev, "Going to wait for device boot (up to %lds)\n",
|
|
cpu_timeout / USEC_PER_SEC);
|
|
|
|
/* Wait for boot FIT request */
|
|
rc = hl_poll_timeout(
|
|
hdev,
|
|
cpu_boot_status_reg,
|
|
status,
|
|
status == CPU_BOOT_STATUS_WAITING_FOR_BOOT_FIT,
|
|
10000,
|
|
boot_fit_timeout);
|
|
|
|
if (rc) {
|
|
dev_dbg(hdev->dev,
|
|
"No boot fit request received, resuming boot\n");
|
|
} else {
|
|
rc = hdev->asic_funcs->load_boot_fit_to_device(hdev);
|
|
if (rc)
|
|
goto out;
|
|
|
|
/* Clear device CPU message status */
|
|
WREG32(cpu_msg_status_reg, CPU_MSG_CLR);
|
|
|
|
/* Signal device CPU that boot loader is ready */
|
|
WREG32(msg_to_cpu_reg, KMD_MSG_FIT_RDY);
|
|
|
|
/* Poll for CPU device ack */
|
|
rc = hl_poll_timeout(
|
|
hdev,
|
|
cpu_msg_status_reg,
|
|
status,
|
|
status == CPU_MSG_OK,
|
|
10000,
|
|
boot_fit_timeout);
|
|
|
|
if (rc) {
|
|
dev_err(hdev->dev,
|
|
"Timeout waiting for boot fit load ack\n");
|
|
goto out;
|
|
}
|
|
|
|
/* Clear message */
|
|
WREG32(msg_to_cpu_reg, KMD_MSG_NA);
|
|
}
|
|
|
|
/* Make sure CPU boot-loader is running */
|
|
rc = hl_poll_timeout(
|
|
hdev,
|
|
cpu_boot_status_reg,
|
|
status,
|
|
(status == CPU_BOOT_STATUS_DRAM_RDY) ||
|
|
(status == CPU_BOOT_STATUS_NIC_FW_RDY) ||
|
|
(status == CPU_BOOT_STATUS_READY_TO_BOOT) ||
|
|
(status == CPU_BOOT_STATUS_SRAM_AVAIL),
|
|
10000,
|
|
cpu_timeout);
|
|
|
|
/* Read U-Boot version now in case we will later fail */
|
|
hdev->asic_funcs->read_device_fw_version(hdev, FW_COMP_UBOOT);
|
|
|
|
if (rc) {
|
|
detect_cpu_boot_status(hdev, status);
|
|
rc = -EIO;
|
|
goto out;
|
|
}
|
|
|
|
if (!hdev->fw_loading) {
|
|
dev_info(hdev->dev, "Skip loading FW\n");
|
|
goto out;
|
|
}
|
|
|
|
if (status == CPU_BOOT_STATUS_SRAM_AVAIL)
|
|
goto out;
|
|
|
|
dev_info(hdev->dev,
|
|
"Loading firmware to device, may take some time...\n");
|
|
|
|
rc = hdev->asic_funcs->load_firmware_to_device(hdev);
|
|
if (rc)
|
|
goto out;
|
|
|
|
if (skip_bmc) {
|
|
WREG32(msg_to_cpu_reg, KMD_MSG_SKIP_BMC);
|
|
|
|
rc = hl_poll_timeout(
|
|
hdev,
|
|
cpu_boot_status_reg,
|
|
status,
|
|
(status == CPU_BOOT_STATUS_BMC_WAITING_SKIPPED),
|
|
10000,
|
|
cpu_timeout);
|
|
|
|
if (rc) {
|
|
dev_err(hdev->dev,
|
|
"Failed to get ACK on skipping BMC, %d\n",
|
|
status);
|
|
WREG32(msg_to_cpu_reg, KMD_MSG_NA);
|
|
rc = -EIO;
|
|
goto out;
|
|
}
|
|
}
|
|
|
|
WREG32(msg_to_cpu_reg, KMD_MSG_FIT_RDY);
|
|
|
|
rc = hl_poll_timeout(
|
|
hdev,
|
|
cpu_boot_status_reg,
|
|
status,
|
|
(status == CPU_BOOT_STATUS_SRAM_AVAIL),
|
|
10000,
|
|
cpu_timeout);
|
|
|
|
/* Clear message */
|
|
WREG32(msg_to_cpu_reg, KMD_MSG_NA);
|
|
|
|
if (rc) {
|
|
if (status == CPU_BOOT_STATUS_FIT_CORRUPTED)
|
|
dev_err(hdev->dev,
|
|
"Device reports FIT image is corrupted\n");
|
|
else
|
|
dev_err(hdev->dev,
|
|
"Failed to load firmware to device, %d\n",
|
|
status);
|
|
|
|
rc = -EIO;
|
|
goto out;
|
|
}
|
|
|
|
dev_info(hdev->dev, "Successfully loaded firmware to device\n");
|
|
|
|
out:
|
|
fw_read_errors(hdev, boot_err0_reg);
|
|
|
|
return rc;
|
|
}
|