mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
1c82407aa3
This adds documentation for the MediaTek Global Command Engine (GCE) unit found in MT8173 SoCs. Signed-off-by: Houlong Wei <houlong.wei@mediatek.com> Signed-off-by: HS Liao <hs.liao@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
58 lines
1.9 KiB
Plaintext
58 lines
1.9 KiB
Plaintext
MediaTek GCE
|
|
===============
|
|
|
|
The Global Command Engine (GCE) is used to help read/write registers with
|
|
critical time limitation, such as updating display configuration during the
|
|
vblank. The GCE can be used to implement the Command Queue (CMDQ) driver.
|
|
|
|
CMDQ driver uses mailbox framework for communication. Please refer to
|
|
mailbox.txt for generic information about mailbox device-tree bindings.
|
|
|
|
Required properties:
|
|
- compatible: Must be "mediatek,mt8173-gce"
|
|
- reg: Address range of the GCE unit
|
|
- interrupts: The interrupt signal from the GCE block
|
|
- clock: Clocks according to the common clock binding
|
|
- clock-names: Must be "gce" to stand for GCE clock
|
|
- #mbox-cells: Should be 3.
|
|
<&phandle channel priority atomic_exec>
|
|
phandle: Label name of a gce node.
|
|
channel: Channel of mailbox. Be equal to the thread id of GCE.
|
|
priority: Priority of GCE thread.
|
|
atomic_exec: GCE processing continuous packets of commands in atomic
|
|
way.
|
|
|
|
Required properties for a client device:
|
|
- mboxes: Client use mailbox to communicate with GCE, it should have this
|
|
property and list of phandle, mailbox specifiers.
|
|
- mediatek,gce-subsys: u32, specify the sub-system id which is corresponding
|
|
to the register address.
|
|
|
|
Some vaules of properties are defined in 'dt-bindings/gce/mt8173-gce.h'. Such as
|
|
sub-system ids, thread priority, event ids.
|
|
|
|
Example:
|
|
|
|
gce: gce@10212000 {
|
|
compatible = "mediatek,mt8173-gce";
|
|
reg = <0 0x10212000 0 0x1000>;
|
|
interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_LOW>;
|
|
clocks = <&infracfg CLK_INFRA_GCE>;
|
|
clock-names = "gce";
|
|
thread-num = CMDQ_THR_MAX_COUNT;
|
|
#mbox-cells = <3>;
|
|
};
|
|
|
|
Example for a client device:
|
|
|
|
mmsys: clock-controller@14000000 {
|
|
compatible = "mediatek,mt8173-mmsys";
|
|
mboxes = <&gce 0 CMDQ_THR_PRIO_LOWEST 1>,
|
|
<&gce 1 CMDQ_THR_PRIO_LOWEST 1>;
|
|
mediatek,gce-subsys = <SUBSYS_1400XXXX>;
|
|
mutex-event-eof = <CMDQ_EVENT_MUTEX0_STREAM_EOF
|
|
CMDQ_EVENT_MUTEX1_STREAM_EOF>;
|
|
|
|
...
|
|
};
|