mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-08 11:56:41 +07:00
3223d007a3
commit 2f34ce81b8
(OMAP3: PM: Adding voltage driver support.)
introduced runtime computation of waittime to handle all potential
sys clocks available.
In the voltage processor, the SPMSUpdateWait is calculated based on
the slew rate and the voltage step (SMPSUpdateWait = slew rate *
Voltage Step). After the voltage processor receives the SMPS_Ack
signal, the Voltage Controller will wait for SMPSUpdateWait clock
cycles for the voltage to settle to the new value. For all
practical purposes, the waittime parameter is the OMAP hardware
translation of what the slew rate on the PMIC is.
As an example, with TPS62361 on OMAP4460,
step_size = 10000
slew_rate = 32000
sys_clk_rate = 38400
Our current computation results in the following:
= ((step_size / slew_rate) * sys_clk_rate) / 1000
= ((10000 / 32000) * 38400 / 1000
= 0
Fix the same using DIV_ROUND_UP as an extra wait clock cycle
is better than lesser clock cycle. For the above example, this
translates to:
= (10000 * 38400) / (1000 * 32000)
= 12
Acked-by: Jon Hunter <jon-hunter@ti.com>
[nm@ti.com: slightly better implementation]
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Yuan Jiangli <jlyuan@motorola.com>
Acked-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
284 lines
7.2 KiB
C
284 lines
7.2 KiB
C
#include <linux/kernel.h>
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#include <linux/init.h>
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#include "common.h"
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#include "voltage.h"
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#include "vp.h"
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#include "prm-regbits-34xx.h"
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#include "prm-regbits-44xx.h"
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#include "prm44xx.h"
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static u32 _vp_set_init_voltage(struct voltagedomain *voltdm, u32 volt)
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{
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struct omap_vp_instance *vp = voltdm->vp;
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u32 vpconfig;
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char vsel;
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vsel = voltdm->pmic->uv_to_vsel(volt);
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vpconfig = voltdm->read(vp->vpconfig);
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vpconfig &= ~(vp->common->vpconfig_initvoltage_mask |
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vp->common->vpconfig_forceupdate |
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vp->common->vpconfig_initvdd);
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vpconfig |= vsel << __ffs(vp->common->vpconfig_initvoltage_mask);
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voltdm->write(vpconfig, vp->vpconfig);
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/* Trigger initVDD value copy to voltage processor */
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voltdm->write((vpconfig | vp->common->vpconfig_initvdd),
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vp->vpconfig);
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/* Clear initVDD copy trigger bit */
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voltdm->write(vpconfig, vp->vpconfig);
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return vpconfig;
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}
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/* Generic voltage init functions */
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void __init omap_vp_init(struct voltagedomain *voltdm)
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{
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struct omap_vp_instance *vp = voltdm->vp;
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u32 val, sys_clk_rate, timeout, waittime;
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u32 vddmin, vddmax, vstepmin, vstepmax;
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if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) {
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pr_err("%s: No PMIC info for vdd_%s\n", __func__, voltdm->name);
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return;
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}
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if (!voltdm->read || !voltdm->write) {
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pr_err("%s: No read/write API for accessing vdd_%s regs\n",
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__func__, voltdm->name);
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return;
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}
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vp->enabled = false;
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/* Divide to avoid overflow */
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sys_clk_rate = voltdm->sys_clk.rate / 1000;
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timeout = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000;
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vddmin = voltdm->pmic->vp_vddmin;
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vddmax = voltdm->pmic->vp_vddmax;
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waittime = DIV_ROUND_UP(voltdm->pmic->step_size * sys_clk_rate,
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1000 * voltdm->pmic->slew_rate);
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vstepmin = voltdm->pmic->vp_vstepmin;
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vstepmax = voltdm->pmic->vp_vstepmax;
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/*
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* VP_CONFIG: error gain is not set here, it will be updated
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* on each scale, based on OPP.
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*/
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val = (voltdm->pmic->vp_erroroffset <<
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__ffs(voltdm->vp->common->vpconfig_erroroffset_mask)) |
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vp->common->vpconfig_timeouten;
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voltdm->write(val, vp->vpconfig);
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/* VSTEPMIN */
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val = (waittime << vp->common->vstepmin_smpswaittimemin_shift) |
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(vstepmin << vp->common->vstepmin_stepmin_shift);
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voltdm->write(val, vp->vstepmin);
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/* VSTEPMAX */
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val = (vstepmax << vp->common->vstepmax_stepmax_shift) |
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(waittime << vp->common->vstepmax_smpswaittimemax_shift);
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voltdm->write(val, vp->vstepmax);
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/* VLIMITTO */
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val = (vddmax << vp->common->vlimitto_vddmax_shift) |
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(vddmin << vp->common->vlimitto_vddmin_shift) |
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(timeout << vp->common->vlimitto_timeout_shift);
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voltdm->write(val, vp->vlimitto);
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}
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int omap_vp_update_errorgain(struct voltagedomain *voltdm,
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unsigned long target_volt)
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{
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struct omap_volt_data *volt_data;
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if (!voltdm->vp)
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return -EINVAL;
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/* Get volt_data corresponding to target_volt */
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volt_data = omap_voltage_get_voltdata(voltdm, target_volt);
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if (IS_ERR(volt_data))
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return -EINVAL;
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/* Setting vp errorgain based on the voltage */
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voltdm->rmw(voltdm->vp->common->vpconfig_errorgain_mask,
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volt_data->vp_errgain <<
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__ffs(voltdm->vp->common->vpconfig_errorgain_mask),
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voltdm->vp->vpconfig);
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return 0;
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}
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/* VP force update method of voltage scaling */
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int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
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unsigned long target_volt)
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{
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struct omap_vp_instance *vp = voltdm->vp;
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u32 vpconfig;
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u8 target_vsel, current_vsel;
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int ret, timeout = 0;
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ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel);
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if (ret)
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return ret;
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/*
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* Clear all pending TransactionDone interrupt/status. Typical latency
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* is <3us
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*/
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while (timeout++ < VP_TRANXDONE_TIMEOUT) {
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vp->common->ops->clear_txdone(vp->id);
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if (!vp->common->ops->check_txdone(vp->id))
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break;
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udelay(1);
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}
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if (timeout >= VP_TRANXDONE_TIMEOUT) {
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pr_warning("%s: vdd_%s TRANXDONE timeout exceeded."
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"Voltage change aborted", __func__, voltdm->name);
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return -ETIMEDOUT;
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}
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vpconfig = _vp_set_init_voltage(voltdm, target_volt);
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/* Force update of voltage */
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voltdm->write(vpconfig | vp->common->vpconfig_forceupdate,
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voltdm->vp->vpconfig);
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/*
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* Wait for TransactionDone. Typical latency is <200us.
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* Depends on SMPSWAITTIMEMIN/MAX and voltage change
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*/
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timeout = 0;
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omap_test_timeout(vp->common->ops->check_txdone(vp->id),
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VP_TRANXDONE_TIMEOUT, timeout);
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if (timeout >= VP_TRANXDONE_TIMEOUT)
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pr_err("%s: vdd_%s TRANXDONE timeout exceeded."
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"TRANXDONE never got set after the voltage update\n",
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__func__, voltdm->name);
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omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel);
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/*
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* Disable TransactionDone interrupt , clear all status, clear
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* control registers
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*/
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timeout = 0;
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while (timeout++ < VP_TRANXDONE_TIMEOUT) {
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vp->common->ops->clear_txdone(vp->id);
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if (!vp->common->ops->check_txdone(vp->id))
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break;
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udelay(1);
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}
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if (timeout >= VP_TRANXDONE_TIMEOUT)
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pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while trying"
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"to clear the TRANXDONE status\n",
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__func__, voltdm->name);
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/* Clear force bit */
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voltdm->write(vpconfig, vp->vpconfig);
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return 0;
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}
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/**
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* omap_vp_enable() - API to enable a particular VP
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* @voltdm: pointer to the VDD whose VP is to be enabled.
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*
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* This API enables a particular voltage processor. Needed by the smartreflex
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* class drivers.
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*/
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void omap_vp_enable(struct voltagedomain *voltdm)
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{
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struct omap_vp_instance *vp;
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u32 vpconfig, volt;
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if (!voltdm || IS_ERR(voltdm)) {
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pr_warning("%s: VDD specified does not exist!\n", __func__);
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return;
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}
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vp = voltdm->vp;
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if (!voltdm->read || !voltdm->write) {
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pr_err("%s: No read/write API for accessing vdd_%s regs\n",
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__func__, voltdm->name);
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return;
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}
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/* If VP is already enabled, do nothing. Return */
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if (vp->enabled)
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return;
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volt = voltdm_get_voltage(voltdm);
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if (!volt) {
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pr_warning("%s: unable to find current voltage for %s\n",
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__func__, voltdm->name);
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return;
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}
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vpconfig = _vp_set_init_voltage(voltdm, volt);
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/* Enable VP */
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vpconfig |= vp->common->vpconfig_vpenable;
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voltdm->write(vpconfig, vp->vpconfig);
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vp->enabled = true;
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}
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/**
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* omap_vp_disable() - API to disable a particular VP
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* @voltdm: pointer to the VDD whose VP is to be disabled.
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*
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* This API disables a particular voltage processor. Needed by the smartreflex
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* class drivers.
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*/
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void omap_vp_disable(struct voltagedomain *voltdm)
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{
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struct omap_vp_instance *vp;
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u32 vpconfig;
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int timeout;
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if (!voltdm || IS_ERR(voltdm)) {
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pr_warning("%s: VDD specified does not exist!\n", __func__);
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return;
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}
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vp = voltdm->vp;
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if (!voltdm->read || !voltdm->write) {
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pr_err("%s: No read/write API for accessing vdd_%s regs\n",
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__func__, voltdm->name);
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return;
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}
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/* If VP is already disabled, do nothing. Return */
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if (!vp->enabled) {
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pr_warning("%s: Trying to disable VP for vdd_%s when"
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"it is already disabled\n", __func__, voltdm->name);
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return;
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}
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/* Disable VP */
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vpconfig = voltdm->read(vp->vpconfig);
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vpconfig &= ~vp->common->vpconfig_vpenable;
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voltdm->write(vpconfig, vp->vpconfig);
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/*
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* Wait for VP idle Typical latency is <2us. Maximum latency is ~100us
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*/
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omap_test_timeout((voltdm->read(vp->vstatus)),
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VP_IDLE_TIMEOUT, timeout);
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if (timeout >= VP_IDLE_TIMEOUT)
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pr_warning("%s: vdd_%s idle timedout\n",
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__func__, voltdm->name);
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vp->enabled = false;
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return;
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}
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